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Lanai, the mystery CPU architecture in LLVM

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Re: Lanai, the mystery CPU architecture in LLVM

#71

Earlier quoted context omitted.

> How many man-hours have been wasted waiting for the Lanai backend to compile? Probably zero? Is it compiled by default?

Yes. Run `strings /usr/lib/libLLVM.so| grep -i Lanai` to check on your version ; mine has all the relevant symbols

Oh, wow. I'm honestly surprised. My build does not.

Re: Lanai, the mystery CPU architecture in LLVM

#72
post #4

I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...

This line in that post is mystifying: they peddled Infiniband, an inferior design based on bus technology, but repositioned as a point to point network

[deleted]

Re: Lanai, the mystery CPU architecture in LLVM

#73
post #68

Earlier quoted context omitted.

Interesting - I had never heard of Myricom. I have used Infiniband quite a bit in budget super high performance applications - the old hardware can sometimes be found quite cheaply compared to 40gig/100gig ethernet (or it was at least a few years ago). Much more fiddly to get working but the performance was impressive once it did.

For what it's worth, I've had rather more trouble with Ethernet than IB, especially given IB management facilities.

IB always seemed like the kind of thing where you loose out a lot of comfort if you go with "old hardware sometimes found cheaply" and thus don't have vendor support, have to dig out drivers and tools from random sources, ...

Re: Lanai, the mystery CPU architecture in LLVM

#74
post #31

Earlier quoted context omitted.

Given how ridiculously strict the Linux folks are being with the DXGKRNL stuff that MS is working on (which is public as part of WSLg), I would say definitely not.

I think that has more to do with DXGKRNL coming from Microsoft than any policy that would be applied to other contributers.

Other Microsoft contributions got into the kernel just fine.

Re: Lanai, the mystery CPU architecture in LLVM

#75

Earlier quoted context omitted.

I'm not sure that part of Scott's article was accurate. I worked remotely, and I'm pretty sure that I was offered benefits. I declined them, and used my wife's benefits because they were less expensive, and meshed better with local health care providers. EDIT: And I know we had a 401K

I worked there and have evidence that this statement in the blog is not true, and I'm being down-voted?

Downvotes are fickle things. Unrelated, why turn down the health care? With double health care you can tell you're health provider you've got double coverage and they will bill the primary first, and then the secondary for what is left (and if the secondary is designed to be a primary program it will cover all that is left so you end up with zero out of pocket, even for co-payments).

Re: Lanai, the mystery CPU architecture in LLVM

#76
post #12

Earlier quoted context omitted.

Why can you not comment? Certainly any NDA you signed must be expired by now. PSA: If you are not getting continuing payments, any contracts you signed are void. Technically, I gather you are supposed to notify the other party that you are terminating your participation in the contract. Even if you are getting ongoing payments, you can opt out of that, too. (This is not legal advice. Consult an actual lawyer for anyt…

It is absolutely not the case that you can just quit a company, wait a year, and then dump all their confidential information. Even if there were no legal repercussions (which there are), that's a great way to never be hired again.

Never be hired because you gave away most of your value for free?

Re: Lanai, the mystery CPU architecture in LLVM

#77
Googler, opinions are my own.

Btw, the Lanai target in LLVM can be found here: https://github.com/llvm/llvm-project/tree/main/llvm/lib/Targ.... Latest commit is only 24 days ago, so it looks to still be active. Though I'm not sure how much of that is generic target updates, vs target specific changes.

Re: Lanai, the mystery CPU architecture in LLVM

#79
post #2

> The world's best instruction mnemonic: PUNT, to switch between user and system contexts. That's pretty good but I still prefer PowerPC's EIEIO. https://www.ibm.com/docs/en/aix/7.2?topic=set-eieio-enforce-...

There are many great Power mnemonics. VSX introduced one nearly as good, xxlxor (which, quite reasonably, is a logical XOR between VSX registers/FPRs). It's delightful to try to even pronounce. The best part is that eieio's derivation is totally plausibly serious from its stated function. (Remember, IBM doesn't have a corporate sense of humour.) It's also an easy, fairly lightweight speculation barrier apart from its…

My favorite PPC instruction is darn. It delivers a random number, either raw or NIST conditioned. We decided to use the same instruction name in an internal RISCV implementation, and fun times have been had complaining about the darn instruction not working.

Re: Lanai, the mystery CPU architecture in LLVM

#80

How would Lanai compare to a simple RV32I isa/core for this application area? The short description in OP doesn't really clarify what, if anything, might be specifically compelling about this arch.

Lanai is significantly older than RISC-V. These days you'd likely easily pick designing or using an existing RISC-V core for an application like this, possibly adapting it to your particular usecase.

The decision is different, however, if you happen to have the entirety of the Lanai engineering team on board and own the entire Lanai IP portfolio. :)

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