71–80 of 159 posts
Oof, GPU by Imagination Technologies. Here's hoping their close brush with death opened them to the idea of open sourcing their code.
"but the memory PHY, USB 3.0 PHY, GPU, and other I/Os will still be closed source"
"even though the goal is to eventually have as much IP released under a BSD-like open source license" What do people mean _exactly_ by 'IP' in contexts like this related to computing boards such as SBCs and FPGAs? The only 'IP' I know is a term pertaining to legal concepts like patents, where 'IP' and 'patent' are almost synonymous. In the current context, what does it mean to 'release' this 'IP'? How do you 'release…
https://en.m.wikipedia.org/wiki/Semiconductor_intellectual_p... It's a logic or semiconductor layout design for a component (e.g. a processor core, or a peripheral like a UART, DMA controller, etc.). "IP" for hardware is roughly analogous to "source code" for software.
Apparently they plan to include a PowerVR GPU on the second generation boards. That's not very OSHW if you ask me. I'd rather an unaccelerated framebuffer, or even no graphics at all. They don't seem to understand what kind of market there is for this sort of device. If I didn't care about this sort of thing, I would just grab one of the many proprietary-encumbered SBCs, any of which faster and cheaper than this boar…
FWIW, every chip I've seen with a PowerVR GPU uses a video scan out engine that's pretty much completely disconnected from the GPU. That's one of the neat things about how programmable their cores are; you can resolve in the tile to just about any surface format since it's all done in software anyway, so it's really easy to integrate with other scan IP blocks. TL;DR: You'll probably get a simple un-accelerated frameb…
The problem is that I can't, and most people who care about freedom and thus could be interested in a slower, more expensive board... can't either.
Oof, GPU by Imagination Technologies. Here's hoping their close brush with death opened them to the idea of open sourcing their code.
Oof indeed. I'd rather unaccelerated graphics. Hell, take any display solution from opencores. But don't give me proprietary garbage and especially not PowerVR. I'm OK with no graphics as an alternative. Hell, I could always use some USB display solution.
Then you'll be fine with the first version of this, since it's exactly that.
This is RISC-V, with a neural co-processor (runs YOLO), camera, GPIOs, leds etc. For $25.
It runs MicroPython out of the box, but someone has Linux booting on the board equivalent.
I have one, and there are teething pains but the platform seems pretty capable.
Why is RISC-V even so hyped up/successful? Other open ISAs precede it, and AFAIK the code density that RISC-V allows is disappointing considering the designers had an opportunity to start from scratch.
One concrete advantage RISCV has is its variable-length SIMD instruction set. The assembly instructions used for SIMD in RISCV can all operate on data sizes that are various powers of 2. All using the same instructions. You could even call it “SIMD with dynamically-sized data”. Right now, x86 needs one set of instructions for each SIMD data size. That’s why we have SSE, AVX, AVX512, etc. This introduces complexity fo…
If you look at the encodings, many of them are actually the same opcodes as the original MMX, but with prefixes.
In the proposed RISCV design, you wouldn’t have to. It would just work on all sizes.
That doesn't make sense --- how would the code know how much to increment pointers by, how many times to loop, alignment, etc. ? Unless they added some really un-RISC instructions to do automatic vectored operations (like if x86 had a REP ADDSB), I don't see how you wouldn't need to change software for changing SIMD widths.
Interesting that the group behind this is Tsinghua-Berkeley Shenzhen Institute, which is sponsored by UC Berkeley as well as a major Chinese university and the Shenzhen government. China is quite interested in RISC-V gaining traction as trade and security barriers rise and they work to build up their domestic technology sector. Going into wild-ass speculation mode, if this board really is affordable, I wonder if it's…
Do we know the foundry? I like your idea because I could see the Chinese government doing this to help prop up SMIC too. The RPi4 isn't any smaller than 16nm, and SMIC needs 14nm customers. Shoot for the 500MHz target listed, which is achievable with Victorian era style over engineering. Next sell those more or less at cost after the government footed the bill for initial capital (probably paying back .gov.cn first).…
https://www.cnx-software.com/wp-content/uploads/2020/09/Pico...
Why is RISC-V even so hyped up/successful? Other open ISAs precede it, and AFAIK the code density that RISC-V allows is disappointing considering the designers had an opportunity to start from scratch.
> the code density that RISC-V allows is disappointing considering the designers had an opportunity to start from scratch. IIRC the code density beats ARMv8 and x86_64 in most situations.
Promising hardware, though this isn't looking like comparable hardware even to the Raspberry Pi Zero. Only has a quad-core 64-bit RISC-V (RV64GC) processor at 500+ MHz. RAM size not specified. If it was priced in the $5-15 range it would be more or less practical, but higher than that I'd be buying it solely for the architecture novelty.
The Arduino Uno retails for around $30 and gives you a 16MHz CPU and 2KB of RAM so I don’t think specs and price are that related, especially when looking at different architectures.
Earlier quoted context omitted.
There's a great deal of communication that happens outside the operating system, and a bunch of different multiplexing modes and things like that. There's at least 4 different speeds it's going to need to talk at (1.5mbps, 12mbps, 480mbps, and 5gbps) with a good deal of synchronization and other bits. There's a rather decent amount of logic that has to be implemented, and I wouldn't be shocked if you end up needing w…
The popular Cypress/Infineon FX3 USB3 controller has a 200 MHz ARM926EJ core on chip. https://www.cypress.com/file/140296/download
