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Cheap FPGA Development Boards

joelw.id.au

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Re: Cheap FPGA Development Boards

#61

Post by tyingq »

snvzz wrote: post #59
tyingq wrote: post #57

Earlier quoted context omitted.

Unfortunately, there's not a good single solution. Best depends on single vs bi-directional (also, which direction), switching speed, tristate or not, etc.

I do pretty much need to interface a 68000 bus. D lines and some signals need to be bidirectional. And I might even need to do bus mastering, so most signals would have to be.

This doc might be useful:

http://marc.retronik.fr/motorola/68K/68000/The_68000_and_its...

And, yeah...you have some work ahead. Lots of bi-directional, tristate, open drain, totem pole/push-pull, etc.

Re: Cheap FPGA Development Boards

#62

Post by snvzz »

tyingq wrote: post #61
snvzz wrote: post #59

Earlier quoted context omitted.

I do pretty much need to interface a 68000 bus. D lines and some signals need to be bidirectional. And I might even need to do bus mastering, so most signals would have to be.

This doc might be useful: http://marc.retronik.fr/motorola/68K/68000/The_68000_and_its... And, yeah...you have some work ahead. Lots of bi-directional, tristate, open drain, totem pole/push-pull, etc.

Yes, a major pita. Mainly afraid of not groking the bus and driving the bus at the same time as the 68k. The working idea is to use a bunch of some sort of voltage translator chip (finding the right one for this is the pain point), and imposing constraints so that if the CPU is driving the address or data bus as signaled by e.g. /AS or the R/W signal, then the translators won't drive it. With a bunch of 74s or a CPLD in the 5v side.

I didn't have that one PDF, so I saved it for safe-keeping with my other 68k stuff. Thanks.

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