Now someone needs to write an x86 emulator in 6502 asm and boot windows.
Clocking a 6502 simulator to 15GHz
61–70 of 79 posts
Re: Clocking a 6502 simulator to 15GHz
#62Re: Clocking a 6502 simulator to 15GHz
#63I was told by Leonard Tramiel (who was my manager at Atari for a while) that the world record for a production 6502 was 25Mhz. This was demonstrated one Friday evening, some time after the beer fridge had been opened in one of the labs. I don't know if they applied any kind of external cooling, or what the benchmark was. Probably it was "keep cranking up the clock until pins stop wiggling or smoke comes out." Not ver…
From the Commodore book, about the early 80s:
"We actually made a couple of really hot processors for a chess tournament for somebody. He literally water-cooled it, and he ran it at something like eight megahertz. It was just ridiculous how fast he ran it."
Earlier it was explained that some processors coming off the production line could run faster than others, and they could test for it to pick the best ones for such purposes. They didn't end up increasing the clock speed for released computers, as other components could not keep up.
Re: Clocking a 6502 simulator to 15GHz
#64I was told by Leonard Tramiel (who was my manager at Atari for a while) that the world record for a production 6502 was 25Mhz. This was demonstrated one Friday evening, some time after the beer fridge had been opened in one of the labs. I don't know if they applied any kind of external cooling, or what the benchmark was. Probably it was "keep cranking up the clock until pins stop wiggling or smoke comes out." Not ver…
Can anyone with an electronics background explain why it's so hard to clock a 6502 higher than a handful of MHz, when modern chips can do 1000x that? Is it just larger transistor scale leading to excess capacitance / slower switching?
Re: Clocking a 6502 simulator to 15GHz
#65It would be interesting to compare this project to simply converting 6502 assembly into LLVM IR, and letting clangs optimization passes work their magic. Obviously self modifying code would be hard to handle, but every other case ought to work, and the auto-vectorization ought to do amazing things to some loop-heavy code.
Self modifying code was the norm. I hated the loss of optimizations you could do when going to a system on non-self-modifying code. I ended up just giving up on assembly.
I remember thinking, "oh? this was made by people who can't code!?" then I quit entirely.
Before, stuff would reduce to nothing after use. Will this condition continue to change? Will it stay true? (Remove the check) Will it stay false? (remove that chunk of code) and then remove this.
Sure, it was fun. More important: People wrote things that were truly impressive. Writing something that worked was only the beginning.
Until compilers know which buttons are used most frequently they cant fully optimize. Who knows, maybe one day windos will give me a start menu and allow me to reboot when the application freezes up? Maybe one day text input will have some priority? The bare basics basically?
Re: Clocking a 6502 simulator to 15GHz
#66I was told by Leonard Tramiel (who was my manager at Atari for a while) that the world record for a production 6502 was 25Mhz. This was demonstrated one Friday evening, some time after the beer fridge had been opened in one of the labs. I don't know if they applied any kind of external cooling, or what the benchmark was. Probably it was "keep cranking up the clock until pins stop wiggling or smoke comes out." Not ver…
Can anyone with an electronics background explain why it's so hard to clock a 6502 higher than a handful of MHz, when modern chips can do 1000x that? Is it just larger transistor scale leading to excess capacitance / slower switching?
One reason is that: transistor size and switching speed. Though the technology of the 6502 probably could go 50MHz? 100MHz? Not sure. Would it be equivalent to 74HC TTL line? Again not sure
But the main (basic) reason is that the internal logic blocks don't worry too much about processing and arrival times beyond the speed at which they need to operate. What's simultaneous at 1MHz might be not so simultaneous at 10MHz or 100MHz
Another (advanced) reason why overclocking it might be hard is EM interference inside and outside the chip.
Re: Clocking a 6502 simulator to 15GHz
#67Earlier quoted context omitted.
18 MHz, actually -- the FPGA clock speed is 73 MHz, but it executes the equivalent of one 6502 clock cycle in four of its clocks. That being said, this was implemented on a budget-line FPGA from 2006 (XC3S50A - a small Xilinx Spartan-3A). A modern performance-line FPGA would probably hit a couple hundred MHz easily.
It's still surprising how little relatively to the level of perceived performance have IPC count improved since seventies.
You're wrong :)
IPCs for 6502 or Z80 (4x "faster" clock but 3-6 cycles per machine cycle) processors were at the count of clock cycles per instruction
Even a measly 386/486 were much faster than that.
Enter the Pentium with the ability to execute 2 instructions in parallel.
IPC count were the big gainers recently as well
Re: Clocking a 6502 simulator to 15GHz
#68Earlier quoted context omitted.
It's still surprising how little relatively to the level of perceived performance have IPC count improved since seventies.
You're wrong :) IPCs for 6502 or Z80 (4x "faster" clock but 3-6 cycles per machine cycle) processors were at the count of clock cycles per instruction Even a measly 386/486 were much faster than that. Enter the Pentium with the ability to execute 2 instructions in parallel. IPC count were the big gainers recently as well
It is still only 20-30 fold at max on average. So much more came from many thousand fold clock speed increase, and much wider execution paths.
Re: Clocking a 6502 simulator to 15GHz
#69Earlier quoted context omitted.
a 6502 backend for LLVM has been attempted a couple times[1][2], but the fact that the 6502 only has three registers imposes severe limitations w.r.t. LLVM's calling conventions. [1] https://github.com/c64scene-ar/llvm-6502 [2] https://github.com/beholdnec/llvm-m6502
Other way around - the idea is to create an LLVM frontend for 6502 machine code, and then transpile that code to run on a modern CPU architecture.
That sounds like an interesting project!
You would probably want to add some tricks directly there, maybe register renaming (I don't know if LLVM does "variable renaming", let's put it this way)
Re: Clocking a 6502 simulator to 15GHz
#70Huh... I hadn't considered it before, but Bender's brain could actually be a 6502, just being run at an insanely high clock speed. A few petahertz should be able to handle the AI involved, no? Planck time is like 10^-43 seconds, so there's lots of room to divvy up a second for more processing power given advanced technologies...
If the hardware is advanced enough to do that, the AI software is similarly advanced, and a basic 6502 can produce a Bender like AI without breaking a sweat!
More advanced software would with all likelihood require significant calculations, rendering a basic 6502 useless.