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Wasm3 – A high performance WebAssembly interpreter in C

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Re: Wasm3 – A high performance WebAssembly interpreter in C

#61
post #60
post #45

Earlier quoted context omitted.

I don't know of any current physical stack machine CPUs.

Stacks are used extensively across the x86 family [0] [0] - https://en.wikipedia.org/wiki/X86_calling_conventions

"Has a stack" isn't the same as "Has a stack based ISA".

Re: Wasm3 – A high performance WebAssembly interpreter in C

#62
post #41

This is pretty exciting if real: > Bytecode/opcodes are translated into more efficient "operations" during a compilation pass, generating pages of meta-machine code WASM compiled to a novel bytecode format aimed at efficient interpretation. > Commonly occurring sequences of operations can can also be optimized into a "fused" operation. Peephole optimizations producing fused opcodes, makes sense. > In M3/Wasm, the sta…

> "WASM translated to register-based bytecode. That's awesome!" If the hardware executing this code is "stack-based" (or, does not offer enough general purpose registers to accomodate the funtion call) - this will need to be converted back to a stack-based function call (either at runtime, or beforehand). Wouldn't this intermediate WASM-to-register-based-bytecode translation be redundant then?

You seem to be asking something like "if we always hit the algorithm's slow path, isn't the algorithm slow?". The answer is "yes, but we will (hopefully) almost never hit the slow path". On x64-64 you will typically be able to pass 6 integer/pointer values and 8 floating-point values in registers. That should be enough for most function calls in real-world code.

Re: Wasm3 – A high performance WebAssembly interpreter in C

#64
post #60
post #45

Earlier quoted context omitted.

I don't know of any current physical stack machine CPUs.

Stacks are used extensively across the x86 family [0] [0] - https://en.wikipedia.org/wiki/X86_calling_conventions

No, stack machine CPUs are pretty obscure things, especially today. See the link below for some examples. All or virtually all modern commercial CPUs are register based.

https://en.wikipedia.org/wiki/Stack_machine#Commercial_stack...

Re: Wasm3 – A high performance WebAssembly interpreter in C

#65

Earlier quoted context omitted.

> The necessity of doing coloring to assign registers efficiently is kind of unfortunate Register based VMs like Lua don't do this. The register allocation is incredibly simple https://github.com/LuaJIT/LuaJIT/blob/v2.1/src/lj_parse.c#L3...

But that's an allocator to virtual registers that don't try to correspond to (a valid number of) physical CPU registers. Sure it's easy to allocate to a large number of registers. It's harder to do it to a small number, like the project discussed here seems to claim to do.

I could be completely wrong but it looks like what this does is more like stack-caching. One operand, if it's the result of the last instruction, should already be in "virtual r0" which is already in a register. For the other operand of the opcode, it's an infinite set of "registers" at an offset from the stack pointer: https://github.com/wasm3/wasm3/tree/b1462d450ca367e39e4b2eb4...

Re: Wasm3 – A high performance WebAssembly interpreter in C

#67
post #66

Impressive list of constrained targets for embedded. The AtMega1284 microcontroller for example has only 16 KB of RAM. Which is a lot for an 8-bit micro, but pretty standard for a modern application processors.

Yup. TinyBLE is nRF51 SoC with 16Kb SRAM as well.

Re: Wasm3 – A high performance WebAssembly interpreter in C

#68

These are impressive performance numbers. > Because operations end with a call to the next function, the C compiler will tail-call optimize most operations. It appears that this relies on tail-call optimization to avoid overflowing the stack. Unfortunately this means you probably can't run it in debug mode.

It's not that bad even in debug mode (or without TCO). Just not optimal. Also, there is a way to rework this part, so it does not rely on compiler TCO.

If the jump to the next opcode is a tail call, wouldn't an arbitrarily long sequence of instructions take arbitrarily much stack space?
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