Live data from Hacker News

MIPS R3000

en.wikipedia.org

61–62 of 62 posts

Re: MIPS R3000

#61
post #29
post #12

Earlier quoted context omitted.

>People blame C= for the downfall of the Amiga >but Motorola abandoning the 68k line was a much bigger factor The engineers had plans going forward. C= just didn't allow it to happen. They scrapped everything.

That's right. It took Commodore seven years to ship a major revision to the Amiga graphics chips, which had four times the display bandwidth and twice the blitter performance. They should have had a 16-fold performance increase in all categories by that time.

Several would-have-been-awesome ready or near-ready new chipset designs were discarded by CBM management. Years upon years of effort wasted, on a critical time in the history of personal computers.

"This is too expensive."

As if releasing what would have been the absolute best microcomputer for several years (as per what actually happened, that is, assuming the competition didn't pull a miracle after seeing it) would have no value. As if economies of scale weren't a thing. As if making it cheaper later wasn't an option.

Morons.

For detail on the insanity, refer to The Insider Story[0] book.

[0] https://blog.amigaguru.com/book-review-commodore-the-inside-...

Re: MIPS R3000

#62
post #55
post #44

Earlier quoted context omitted.

> I'm hoping RISC-V will put an end to x86. It's about time. Not only is this wishful thinking and ignores the success so far of ARM, it doesn't make much sense any more - x86 is already "dead", almost all modern PCs will run amd64, with x86 as a kind of short-instruction emulation mode.

Most likely amd64 was included in the condemnation. If RISC-V gets its Bitmanip extension, it might even deserve to displace ARM and x86. But I might be biased. Still, the barrel shifter on the ARM register bank output was inspired. For its time.

To confirm: Yes, amd64, as a descendant of x86, was included in the condemnation.

As for the bitmanip extension, it is well underway; the latest risc-v workshop had a presentation on it.

The keys, in my opinion, are the vector extension and the DSP extension. They do seem to still be 1-2 year away.

Other than that, there's some work on making interrupt and context switch latency lower. This is important for RTOSs and even more in general for microkernel multiserver operating systems such as Fuchsia which will matter a lot starting in the near future.

Post reply on HN