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Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

phoronix.com

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Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#531

Earlier quoted context omitted.

> Bleeding edge processes is what Intel specializes in. Unlike Apple, they don’t need TSMC. Intel literally outsourced their Arrow Lake manufacturing to TSMC because they couldn't fabricate the parts themselves - their 20A (2nm) process node never reached a production-ready state, and was eventually cancelled about a month ago.

Wasn't it cancelled in favor of 18A?

It was, but that only puts them further away from shipping product.

Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#532
post #480

Earlier quoted context omitted.

I have been hacking on local llama 3 inference software (for the CPU, but I have been thinking about how I would port it to a GPU) and would like to do a rebuttal: https://github.com/ryao/llama3.c Inference workloads are easy to parallelize to N cards with minimal connectivity between them. The Nvlink crossbars and switches just are not needed. In particular, inference can be divided into two distinct phases, which a…

what kind of bandwidth/latency between GPUs would one need in that setup to not be bottlenecking? What you're describing sounds quite forgiving. Is it forgiving enough that we could potentially connect those GPUs over a LAN, or even a remote decentralized cloud of host computers? From my understanding that's certainly possible to do without the latency hurting much with large batching between inference layers

This depends on:

  * the model dimension
  * how many bits per variable are used by your quantization
  * how many tokens are being processed per step (input processing can do all N input tokens simultaneously and output processing can only do 1 at a time when doing a single query)
  * how many times you split the model layers across multiple GPUs
The model dimensions are:

  * 4096 for llama 3/3.1 8B.
  * 8192 for llama 3/3.1 70B.
  * 16384 for llama 3.1 405B.
The model layers are:

  * 32 for llama 3/3.1 8B
  * 80 for llama 3/3.1 70B
  * 126 for llama 3.1 405B
The amount of data that needs to be transferred for each split is surprisingly small. Each time you move the calculation of a subsequent layer to a different GPU, you need to transfer an array that is of size model_dimension * num_tokens * bits_per_variable. Then this reduces to a classic network transfer time problem, where you consider both time until the first byte arrives and the transfer time until the last byte arrives. Reality will likely be longer than that idealized scenario, especially since you need to send a signal saying to begin computing.

Input processing can tackle so many tokens simultaneously that it probably is not worth thinking too much about this penalty there. Output processing is where the penalty is more significant, since you will incur these costs for every token. Let’s say we are doing fp16 or bf16 on llama 3 8B. Then we need to transfer 8KB every time we move the calculation for another layer to another GPU. If you use RDMA and do this over 10GbE, the transfer time would be 6.4 microseconds. If we assume the time to first byte and time to do a signal to begin processing is 3.6 microseconds combined (chosen to round things up), then we get a penalty of 10 microseconds per split, per token. If you are doing 60 tokens per second and split things across 4 GPUs over the network, you have a penalty of 30 microseconds per token. It will run about 0.003% slower and you are not going to notice this at all. Assuming 10GbE with RDMA is somewhat idealized, although I needed to pick something to give some numbers.

In any case, the equation for figuring what factor slower it would be is 1 / (1 + time to do transfers and trigger processing per each token in seconds). That would mean under a less ideal situation where the penalty is 5 milliseconds per token, the calculation will be ~0.99502487562 times what it would have been had it been done in a hypothetical single GPU that has all of the VRAM needed, but otherwise the same specifications. This penalty is also not very noticeable.

In conclusion, you are right. I actually recall seeing a random YouTube video talking about a software project that does clustered interferencing, so people are already doing this. Unfortunately, I do not remember the project name, channel name or video name.

Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#533
post #480

Earlier quoted context omitted.

Disclosure: HPC admin who works with NIVIDA cards here. Because, no. It's not as simple as that. NVIDIA has a complete ecosystem now. They have cards. They have cards of cards (platforms), which they produce, validate and sell. They have NVLink crossbars and switches which connects these cards on their card of cards with very high speeds and low latency. For inter-server communication they have libraries which coordi…

I have been hacking on local llama 3 inference software (for the CPU, but I have been thinking about how I would port it to a GPU) and would like to do a rebuttal: https://github.com/ryao/llama3.c Inference workloads are easy to parallelize to N cards with minimal connectivity between them. The Nvlink crossbars and switches just are not needed. In particular, inference can be divided into two distinct phases, which a…

You are both correct. AI inference is a comparatively easy problem from the perspective of parallelization when compared to most HPC problems.

Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#534
post #480

Earlier quoted context omitted.

I have been hacking on local llama 3 inference software (for the CPU, but I have been thinking about how I would port it to a GPU) and would like to do a rebuttal: https://github.com/ryao/llama3.c Inference workloads are easy to parallelize to N cards with minimal connectivity between them. The Nvlink crossbars and switches just are not needed. In particular, inference can be divided into two distinct phases, which a…

You are both correct. AI inference is a comparatively easy problem from the perspective of parallelization when compared to most HPC problems.

Facebook did a technical paper where they described their training cluster and the sheer amount of complexity is staggering. That said, the original poster was interested in inferencing, not training.

https://arxiv.org/pdf/2407.21783

Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#535
post #480

Earlier quoted context omitted.

Disclosure: HPC admin who works with NIVIDA cards here. Because, no. It's not as simple as that. NVIDIA has a complete ecosystem now. They have cards. They have cards of cards (platforms), which they produce, validate and sell. They have NVLink crossbars and switches which connects these cards on their card of cards with very high speeds and low latency. For inter-server communication they have libraries which coordi…

I have been hacking on local llama 3 inference software (for the CPU, but I have been thinking about how I would port it to a GPU) and would like to do a rebuttal: https://github.com/ryao/llama3.c Inference workloads are easy to parallelize to N cards with minimal connectivity between them. The Nvlink crossbars and switches just are not needed. In particular, inference can be divided into two distinct phases, which a…

I presume the counterargument is that inference hosting is commoditized (sort of like how stateless CPU-based containerized workload hosts are commoditized); there’s no margin in that business, because it is parallelizable, and arbitrarily schedulable, and able to be spread across heterogenous hardware pretty easily (just route individual requests to sub-cluster A or B), preventing any kind of lock-in and thus any kind of rent-extraction by the vendor.

Which therefore means that cards that can only do inference, are fungible. You don’t want to spend CapEx on getting into a new LOB just to sell something fungible.

All the gigantic GPU clusters that you can sell a million at a time to a bigcorp under a high-margin service contract, meanwhile, are training clusters. Nvidia’s market cap right now is fundamentally built on the model-training “space race” going on between the world’s ~15 big AI companies. That’s the non-fungible market.

For Intel to see any benefit (in stock price terms) from an ML-accelerator-card LOB, it’d have to be a card that competes in that space. And that’s a much taller order.

Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#536
post #488

Earlier quoted context omitted.

Inferencing is much more simple than you think: See the precompute_input_logits() and forward() functions here: https://github.com/ryao/llama3.c/blob/master/run.c#L520 As a preface, precompute_input_logits() is really just a generalized version of the forward() function that can operate on multiple input tokens at a time to do faster input processing, although it can be used in place of the forward() function for out…

I am favoriting this comment for reference later when I start poking around in the base level stuff. I find it pretty funny how simple this stuff can get. Have you messed with ternary computing inference yet? I imagine that shrinks the list even further - or at least reduces the compute requirements in favor of brute force addition. https://arxiv.org/html/2410.00907

No. I still have a long list of things to try doing with llama 3 (and possibly later llama 3.1) on more normal formats like fp32 and in the future, fp16. When I get things running on a GPU, I plan to try using bf16 and maybe fp8 if I get hardware that supports it. Low bit quantizations hurt model quality, so I am not very interested in them. Maybe that will change if good quality models trained to use them become available.

Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#537
post #488

Earlier quoted context omitted.

You use at least half of this stack for desktop setups. You need copying daemons, the ecosystem support (docker-nvidia, etc.), some of the libraries, etc. even when you're on a single system. If you're doing inference on a server; MIG comes into play. If you're doing inference on a larger cloud, GPU-direct storage comes into play. It's all modular.

Inferencing is much more simple than you think: See the precompute_input_logits() and forward() functions here: https://github.com/ryao/llama3.c/blob/master/run.c#L520 As a preface, precompute_input_logits() is really just a generalized version of the forward() function that can operate on multiple input tokens at a time to do faster input processing, although it can be used in place of the forward() function for out…

> but sadly, the secrets of how I am doing it are in Intel’s proprietary cblas_sgemm_batch() function.

Perhaps you can reverse engineer it?

Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#538

12GB max is a non-starter for ML work now. Why not come out with a reasonably priced 24gb card even if it isn't the fastest and target it at the ML dev world? Am I missing something here?

> 12GB max is a non-starter for ML work now. Can you even do ML work with a GPU not compatible with CUDA? (genuine question) A quick search showed me the equivalence to CUDA in the Intel world is oneAPI, but in practice, are the major Python libraries used for ML compatible with oneAPI? (Was also gonna ask if oneAPI can run inside Docker but apparently it does [1]) [1] https://hub.docker.com/r/intel/oneapi

https://github.com/intel/intel-extension-for-pytorch

Re: Intel announces Arc B-series "Battlemage" discrete graphics with Linux support

#539

Earlier quoted context omitted.

There is no competition. People get old workstation/server cards

Intel has a huge problem with business units not competing with eachother.

Do they still lock out ECC support on Core processors? I'm still running an ancient i3 for ECC support in my home server.
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