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Two Weeks Until Tapeout

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Re: Two Weeks Until Tapeout

#51

As a person that is using Librelane daily in their workflow, why did they skip Gate-level simulation? Iverilog won't ensure the circuit works after tapeout, CVC most likely will. SDF-annotated simulation actually shows data hazards, as well as transistor timings. https://librelane.readthedocs.io/en/latest/usage/timing_clos...

> Once again, I used Cocotb as the abstracting layer allowing me to interface with multiple different simulators. Namely, icarus verilog for my standard verification and CVC for the post implementation timing annotated netlist.

[deleted]

Re: Two Weeks Until Tapeout

#52
post #11
post #9

Earlier quoted context omitted.

I wrote here a couple days ago: "For a Hacker News degenerate, everything in the world revolves around bean-counting B2B SaaS CRUD crapps, but it doesn't mean it's all there is to the world, right?"

I didn't even know that 180nm was still a thing but clearly it is because apparently the cost difference is like USD 100M for 180nm vs USD 10B or more for the latest tech? Is it true that we will likely have these 180nm chips for things like light bulbs for the foreseeable future?

That's what is expected to finally kill Moore's law: the economics. At some point it'll still be technically possible to fabricate smaller IC structures, stack more layers etc, but the tech to do so (and fabs to do it at scale) will be costly enough that it's just not worth it.

The other point is of course a next-gen fab first needs to be built, and get those yields up. While previous-gen fab already exists - with all the fine-tuning already done & kinks ironed out. Not to mention maaanny applications simply don't need complex ICs (typical 32bit uC comes to mind, but even 8bit ones are still around).

Re: Two Weeks Until Tapeout

#53
post #25
post #3

The thing I love about blog posts like these is how it reminds me that the tech world is a vast ocean that encompasses so many disciplines; it's not all full stack web development. Related: I did not understand 95% of what she wrote.

On some of my cover letters I wrote "full stack from the transistors upwards", because at one point or another I have shipped code in: - IC design software (at a startup bought by Cadence) - an IC (contract out of Dallas semi) - FPGA HFT acceleration - fixing some OS drivers for Windows CE - finding a compiler bug - various bits of embedded firmware in C and assembly for various platforms - debugging with a scope - d…

When I first came to HN, I didn't know what `hn`, `pg`, or other initialisms meant. But I saw people boasting in the new vocabulary of "full stack developer." And I assumed that if companies loved "javascript down to redis" that they would really love that I could do front end all the way down to embedded development. Think of the problems all my full stack knowledge could solve!

Never got an offer through "who's hiring" though.

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