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Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

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Re: Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

#51

Post by adrianN »

anonymous908213 wrote: post #16
oofbey wrote: post #8

Earlier quoted context omitted.

It’s amazing and wonderful to see the Internet support these tiny cliques of interest. Having everybody connected leads to homogenization of culture in some ways, but it also supports these couple dozen (?) people around the world finding each other for this amazing little competition.

Having everybody connected leads to homogenization of culture in some ways The internet may hypothetically homogenize culture relative to a society that does not have any kind of mass communication at all, but relative to the world it was actually introduced into, the internet has completely balkanised the culture. Prior to the internet, we had television, cinema, literature, radio, and newspapers, which were all cen…

Then algorithms optimized content for addictiveness and we’re in a world where a large part of the world looks at the same set of „influencers“.

Re: Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

#53

Post by sehugg »

8f2ab37a-ed6c wrote: post #23
Neywiny wrote: post #10

Earlier quoted context omitted.

I recommend getting started like the author did: simulation first, then FPGA. Honestly FPGA will take you very far. I always get a kick out of being able to design my own SoC. "Hmmm I need 9 separate I2C ports... Ok, copy block, paste paste paste..." Or if you have an operation in software that's taking forever you can write an accelerator for it

What are the best modern tools to get started with in simulation for those who have never dabbled before?

Try https://8bitworkshop.com/verilog to get started with dabbling

Re: Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

#54

Post by alfiedotwtf »

Neywiny wrote: post #10
xphos wrote: post #3

As a computer science guy who interlops in computer engineering i really want to find time to build something cool like this and tapeout. The retro architectures for rendering are simple but fun! I love the project

I recommend getting started like the author did: simulation first, then FPGA. Honestly FPGA will take you very far. I always get a kick out of being able to design my own SoC. "Hmmm I need 9 separate I2C ports... Ok, copy block, paste paste paste..." Or if you have an operation in software that's taking forever you can write an accelerator for it

Are there any open or at least standard FPGAs that the open source community flock to? Last time I looked into FPGAs, it was mostly closed architecture and proprietary tools

Re: Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

#55

Post by Neywiny »

alfiedotwtf wrote: post #54
Neywiny wrote: post #10

Earlier quoted context omitted.

I recommend getting started like the author did: simulation first, then FPGA. Honestly FPGA will take you very far. I always get a kick out of being able to design my own SoC. "Hmmm I need 9 separate I2C ports... Ok, copy block, paste paste paste..." Or if you have an operation in software that's taking forever you can write an accelerator for it

Are there any open or at least standard FPGAs that the open source community flock to? Last time I looked into FPGAs, it was mostly closed architecture and proprietary tools

Not for anything mid to higher range, but I believe there's open source tooling for some of the older Lattice and Xilinx parts. I would say for me it's not as big a deal as on the software side, because each vendor's hardware tends to be pretty different from each other anyway.

Re: Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

#57

Post by Joel_Mckay »

lucyjojo wrote: post #46
amelius wrote: post #26

Earlier quoted context omitted.

Writing hardware is like writing software except parallelism is way cheaper, but mistakes are way more expensive.

that doesnt seem like a good tradeoff...

Hardware takes 20 years to learn how to build properly.

Software takes 1 year under someone smart in a production environment.

People that conflate the two... longer or more likely never.. =3

Re: Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

#58

Post by Joel_Mckay »

Archit3ch wrote: post #24

I'm tempted to put together an FPAA with Tiny Tapeout, but it likely won't fit in the allocated area.

Check the switching speed specification, and shared i/o bank configuration.

The project has a narrow scope of use-cases. =3

Re: Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

#59

Post by checker659 »

Neywiny wrote: post #10
xphos wrote: post #3

As a computer science guy who interlops in computer engineering i really want to find time to build something cool like this and tapeout. The retro architectures for rendering are simple but fun! I love the project

I recommend getting started like the author did: simulation first, then FPGA. Honestly FPGA will take you very far. I always get a kick out of being able to design my own SoC. "Hmmm I need 9 separate I2C ports... Ok, copy block, paste paste paste..." Or if you have an operation in software that's taking forever you can write an accelerator for it

Do you know if there are any tutorials that use bounded model checking tools from the very get go? For verilog or VHDL.

Re: Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

#60

Post by Archit3ch »

Joel_Mckay wrote: post #58
Archit3ch wrote: post #24

I'm tempted to put together an FPAA with Tiny Tapeout, but it likely won't fit in the allocated area.

Check the switching speed specification, and shared i/o bank configuration. The project has a narrow scope of use-cases. =3

Switching speed: should be good enough for audio in the kHz range, even for off-chip control.

Analog i/o pins: definitely limited, even if you purchase the highest option available (6).

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