Earlier quoted context omitted.
> have no idea what a feature flag is in this context nor why they would be standardized (there's only one manufacturer/vendor/supplier of TPUs). X86, ARM, and RISC have all standardized on feature flags which can be reviewed on Linux with /proc/cpuinfo or with dmidecode. cat /proc/cpuinfo | grep -E '^processor|Features|^BogoMIPS|^CPU' There are multiple TPU vendors. I listed multiple AI accelerator TPU products in t…
> There are multiple TPU vendors There are not - TPU is literally a Google trademark: > Tensor Processing Unit (TPU) is an AI accelerator application-specific integrated circuit (ASIC) developed by Google. https://en.wikipedia.org/wiki/Tensor_Processing_Unit The rest of what you're talking about is irrelevant
Helion: A high-level DSL for performant and portable ML kernels
51–52 of 52 posts
Re: Helion: A high-level DSL for performant and portable ML kernels
#52Earlier quoted context omitted.
> have no idea what a feature flag is in this context nor why they would be standardized (there's only one manufacturer/vendor/supplier of TPUs). X86, ARM, and RISC have all standardized on feature flags which can be reviewed on Linux with /proc/cpuinfo or with dmidecode. cat /proc/cpuinfo | grep -E '^processor|Features|^BogoMIPS|^CPU' There are multiple TPU vendors. I listed multiple AI accelerator TPU products in t…
> There are multiple TPU vendors There are not - TPU is literally a Google trademark: > Tensor Processing Unit (TPU) is an AI accelerator application-specific integrated circuit (ASIC) developed by Google. https://en.wikipedia.org/wiki/Tensor_Processing_Unit The rest of what you're talking about is irrelevant
NPU: Neural Processing Unit: https://en.wikipedia.org/wiki/Neural_processing_unit
Coprocessor: https://en.wikipedia.org/wiki/Coprocessor