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ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

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Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#51

Post by smallnamespace »

7thpower wrote: post #6
smallnamespace wrote: post #4

Earlier quoted context omitted.

These observations while good are probably old news (about a decade old) by now. The US has viewed tech as strategic and a realm of competition with China since at least the late Obama admin (so 2015 or so). Semicon as a key strategic goal for China is regularly mentioned in their 5 year plans in an extremely public way. The US has leaned heavily on ASML to go along with export restrictions against China, along with…

You are making the situation sound much less precarious than it is. The reality is that the US has only really done something in the last few years, and those changes and attempts to hedge will take a very long time to materialize. Odds are the US and Europe will never enjoy the comparative advantage Taiwan has in the semiconductor supply chain. What does that mean? One of the west’s key strategic advantages is the a…

Oh I fully agree the situation is precarious. It's just fun seeing people independently start waking up to that fact.

I mean, you could probably see the latter being a cause of the former (if people generally realized the world was no longer that of the 1990s maybe they would on the margin encourage even more proactive/effective policy).

Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#53

Post by rramadass »

mk_stjames wrote: post #41
rramadass wrote: post #40

Coincidentally, i have been recently watching/reading a bunch of videos/articles on ASML and their technology. Can some experts/knowledgeable folks here actually explain the technology in ELI5 (and above) terms? As i understand, a laser (what are its characteristics?) is fired at Tin droplets in a vaccuum chamber causing it to emit light in "Extreme UV" wavelength range which is then focused using a set of Zeiss mirr…

Diffraction sets a limit on how small the features can be patterned using photolith. When the wavelength is larger than the feature size, diffraction causes the light to spread out and blur the edges of what you're trying to pattern. The Rayleigh criterion shows how the ability to separate features depends on the numerical aperture of the system and the wavelength used. The explanation under 'Resolution in projection…

Thank You! The section "Resolution in projection systems" in the above wikipedia link (https://en.wikipedia.org/wiki/Photolithography#Resolution_in...) contains the essential info. It lists the same exact equation which i have linked to in my comment and adds further details, to whit;

The minimum feature size that a projection system can print is given approximately by:

    CD = k1 ⋅ λ / N A
where CD is the minimum feature size (also called the critical dimension, target design rule, or "half-pitch"), λ is the wavelength of light used, and NA is the numerical aperture of the lens as seen from the wafer.

k1 (commonly called k1 factor) is a coefficient that encapsulates process-related factors and typically equals 0.4 for production. (k1 is actually a function of process factors such as the angle of incident light on a reticle and the incident light intensity distribution. It is fixed per process.) The minimum feature size can be reduced by decreasing this coefficient through computational lithography.

According to this equation, minimum feature sizes can be decreased by decreasing the wavelength, and increasing the numerical aperture (to achieve a tighter focused beam and a smaller spot size).

Thus the NA being increased in Hyper-NA (0.75) from High-NA (0.55) results in a smaller "feature size" i.e. smaller nanometers.

I need to read some more but i think i now get the basic Physics concepts involved.

Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#54

Post by chmod775 »

varjag wrote: post #37
sknzl wrote: post #33

Earlier quoted context omitted.

The lithography/EUV optics comes from Zeiss. The laser for generating the plasma from Trumpf. Both key elements that ASML would not be able to build in-house or get from a different supplier.

There's a lot of expertise with lasers and precision optics around the world.

There's a lot of expertise with lithography around the world too (companies like Canon build lithography machines), but we're not talking the usual levels of it.

The EUV lasers ASML/TRUMPF builds don't even work the same way other "conventional" lasers would[1]. You physically can't get there by incrementally improving some existing process. Now I don't know how ZEISS makes mirrors that blown up to the size of a country would have imperfections smaller than a human hair, but I'm pretty sure it's no small feat either.

These companies invested decades and untold sums into this when few other companies even had incentive to attempt it themselves. Sure, other companies could eventually replace them, but you're not closing a 2-decade technology gap in an afternoon.

[1] It's a bit insane, really. Vaporizing falling droplets of tin with two laser pulses 100,000 times a second to get just the right wavelength? Here's a good video: https://www.youtube.com/watch?v=5Ge2RcvDlgw

Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#55

Post by gravescale »

throwaway4good wrote: post #22
Edd1CC wrote: post #20

Earlier quoted context omitted.

I’ve been buying shares in ASML and below, such as TSCM and Applied Materials, but it’s a brittle plan if anything revolutionary pops up!

ASML is going to remain a monopoly and whatever Chinese alternative that there may be is going to stay in China for the foreseeable future. However because the Chinese electronics industry is so big and they rely so much on imports, when they are building alternatives to the US-controlled semiconductor supply chain (ASML, Applied Materials, TSMC etc.), it will matter at one point for ASML even if the Chinese tools an…

> rely so much on imports

Seriously, try to design anything non-trivial without a TI part anywhere. Even in China, foreign brands are everywhere in electronics, and much of it is imported.

There's a lot of scope left for China to penetrate the "low end" semiconductor (and other electronic parts) market as well.

Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#56

Post by jpgvm »

phkahler wrote: post #25
throwaway4good wrote: post #22

Earlier quoted context omitted.

ASML is going to remain a monopoly and whatever Chinese alternative that there may be is going to stay in China for the foreseeable future. However because the Chinese electronics industry is so big and they rely so much on imports, when they are building alternatives to the US-controlled semiconductor supply chain (ASML, Applied Materials, TSMC etc.), it will matter at one point for ASML even if the Chinese tools an…

>> ASML is going to remain a monopoly and whatever Chinese alternative that there may be is going to stay in China. Suppose China develops a cheaper way to produce the EUV light and sells the tools for half what ASML does. They might sell to others just to become the leader.

Or they skip EUV all together and go straight to xray.

IMO that is the real threat to both ASML and the current Western supply chain. By forcing China out you make it very likely they will choose to leap-frog instead of try play catch-up. They did it with EVs there is a very good chance they do it with semiconductors also.

Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#57

Post by rramadass »

f_devd wrote: post #43
rramadass wrote: post #40

Coincidentally, i have been recently watching/reading a bunch of videos/articles on ASML and their technology. Can some experts/knowledgeable folks here actually explain the technology in ELI5 (and above) terms? As i understand, a laser (what are its characteristics?) is fired at Tin droplets in a vaccuum chamber causing it to emit light in "Extreme UV" wavelength range which is then focused using a set of Zeiss mirr…

Not an expert, but I've always understood it as (LI5): You may have heard the effect of light is like a wave, higher frequency wave-lengths have a shorter wavelength, which means it can 'reach' smaller features without impacting the rest of the surroundings. Photo-lithography is done through a mask, this effectively means you get a crisper image projected onto the wafer. If you go too far into/past UV it becomes hard…

User "mk_stjames" pointed me to the answer which you might also find useful - https://news.ycombinator.com/item?id=40680072

Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#58

Post by rramadass »

xeonmc wrote: post #46
rramadass wrote: post #40

Coincidentally, i have been recently watching/reading a bunch of videos/articles on ASML and their technology. Can some experts/knowledgeable folks here actually explain the technology in ELI5 (and above) terms? As i understand, a laser (what are its characteristics?) is fired at Tin droplets in a vaccuum chamber causing it to emit light in "Extreme UV" wavelength range which is then focused using a set of Zeiss mirr…

Visualize the image of a single, perfect point. The waves emanating from from that point would be spherically symmetrical (think a 360deg "field of view"[0], whereas most lenses are Now, since optical paths are two-way, this also implies that forming a perfect point image requires perfectlu spherically symmetric wavefronts[1] converging to that point, causing all the waves to perfectly cancel out each other everywher…

Nice, this in particular;

> Basically, high NA means trying to capture as complete of the total wavefronts as possible to minimize the imbalance, and short wavelength means trying to keep the size of whatever artifact you do end up getting to be as small as possible.

User "mk_stjames" pointed me to the answer which basically explains the equation for the above - https://news.ycombinator.com/item?id=40680072

Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#59

Post by bee_rider »

re-thc wrote: post #10
bee_rider wrote: post #8

Earlier quoted context omitted.

I’m not sure Intel and Samsung are behind TSMC to the extent that switching to their CPUs would be, like, catastrophic. There’s a big advantage to using the newest node because people who buy iPhone want to be assured that their iPhones were made using the best, newest tech. But a 2 year old iPhone is not totally junk, it actually is still a much more powerful computer than almost anybody really needs. TSMC has huge…

> I’m not sure Intel and Samsung are behind TSMC Intel is trying to catch up but Samsung just has no idea. Samsung spent years poaching, merging and sniffing trade secrets to survive. Problem with Intel is that most of it is Intel specific (still)

Why’d you cut off the second half of my sentence? It contained the important caveat, really the main point of the thing—I was responding to the “if I were a G7 nation leader I’d be worried” sentiment.

Intel and Samsung are indisputably behind TSMC, but not in a way that would, like, risk social cohesion or something like that if we had to switch to them.

Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits

#60

Post by schmidtleonard »

gravescale wrote: post #55
throwaway4good wrote: post #22

Earlier quoted context omitted.

ASML is going to remain a monopoly and whatever Chinese alternative that there may be is going to stay in China for the foreseeable future. However because the Chinese electronics industry is so big and they rely so much on imports, when they are building alternatives to the US-controlled semiconductor supply chain (ASML, Applied Materials, TSMC etc.), it will matter at one point for ASML even if the Chinese tools an…

> rely so much on imports Seriously, try to design anything non-trivial without a TI part anywhere. Even in China, foreign brands are everywhere in electronics, and much of it is imported. There's a lot of scope left for China to penetrate the "low end" semiconductor (and other electronic parts) market as well.

5 years ago? Yes. Today? I dunno, the LCSC catalogues have been moving fast.
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