Earlier quoted context omitted.
If you truly wanted to maximize performance per watt , you'd pick a very different design more reminiscent of GPU's. But then single-thread and low-multi-thread performance would really suck. So it will always be a carefully tuned tradeoff.
Nope. Not even. Again, as the grandparent post stated, everything is being sold with the default configuration being redlined. You absolutely can reign it back in to sanity, and get better performance per watt over the previous gen, and still be noticeably faster over the previous gen. -- ----- With AMD, apparently we're going to see BIOS updates from board manufacturers to make doing that simple. Set it to a lower p…
Moore’s Law is dead – Long live the chiplet
51–60 of 123 posts
Re: Moore’s Law is dead – Long live the chiplet
#52I am not convinced moore's law no longer holds true, consider that there is a third dimension that no one has yet figured out. I am no silicon engineer but I suspect a chip that fully takes advantage of the third dimension would be something like a sponge full of built in channels for the working fluid to remove heat. First however I suspect you will see chiplets arranged vertically like heatsink fins and the whole c…
Re: Moore’s Law is dead – Long live the chiplet
#53Moving to chiplets doesn’t change transistor density. This is a packaging feature and not a fabrication feature. This is done for manufacturing cost reduction and yield improvements.
Re: Moore’s Law is dead – Long live the chiplet
#54> Obviously, given these data, volume is VERY important in business models that operate with high fixed and low variable costs. Off-topic but I wonder how much cheaper mobile phones would be if the manufacturers did not have to come up with a hardware design update every year or so? What if mobile phones were built to last longer, which would reduce the cost per phone due to high volume? Of course, I am not suggestin…
Re: Moore’s Law is dead – Long live the chiplet
#55Earlier quoted context omitted.
Nope. Not even. Again, as the grandparent post stated, everything is being sold with the default configuration being redlined. You absolutely can reign it back in to sanity, and get better performance per watt over the previous gen, and still be noticeably faster over the previous gen. -- ----- With AMD, apparently we're going to see BIOS updates from board manufacturers to make doing that simple. Set it to a lower p…
You don't even really need to rein it back, modern processors will throttle back automatically depending on how effective the cooling is. Anyway, the issue with manual undervolting is that it may adversely impact reliability if you ended up with a slightly substandard chip, that will still work fine at stock settings. That's why it can't just be a default.
This isn't about thermals. This is about power consumption.
I'm not suggesting reigning in a CPU's power limits because it's "too hot".
I'm suggesting getting 95% of the performance for 59% of the power consumption. Because it's not worth spending 72% more on electricity for 5% increased performance. Again, even the manufacturers themselves know this and are admitting it. Look at this slide from Intel: https://cdn.arstechnica.net/wp-content/uploads/2022/09/13th-... Purported identical performance of previous gen at 25% of the power consumption. They KNOW the default configuration setting (which you can change in a few keystrokes) is total garbage in terms of power efficiency.
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I guarantee you server CPUs aren't going to be configured to be this idiotic out of the box. Because in the datacenter, perf/W matters and drives purchasing decisions.
Re: Moore’s Law is dead – Long live the chiplet
#56For dummies like me who didn't know what a chiplet is: https://en.wikipedia.org/wiki/Chiplet This seems to be about the third reason listed: > Known good die (KGD): chiplets can be tested before assembly, improving the yield of the final device Problem: > In general, a killer defect is defined as a defect that is 20% the size of the fabrication node. For > example, a defect that is less than 9nm may be acceptable for…
Because a vacuum pretty eliminates dust - with no air, dust just falls towards either the ground (if it is uncharged), or towards a positive or negatively charged surface (if the dust particle itself is charged).
Re: Moore’s Law is dead – Long live the chiplet
#57For dummies like me who didn't know what a chiplet is: https://en.wikipedia.org/wiki/Chiplet This seems to be about the third reason listed: > Known good die (KGD): chiplets can be tested before assembly, improving the yield of the final device Problem: > In general, a killer defect is defined as a defect that is 20% the size of the fabrication node. For > example, a defect that is less than 9nm may be acceptable for…
Re: Moore’s Law is dead – Long live the chiplet
#58For dummies like me who didn't know what a chiplet is: https://en.wikipedia.org/wiki/Chiplet This seems to be about the third reason listed: > Known good die (KGD): chiplets can be tested before assembly, improving the yield of the final device Problem: > In general, a killer defect is defined as a defect that is 20% the size of the fabrication node. For > example, a defect that is less than 9nm may be acceptable for…
Is silicon manufacturing done entirely in a vacuum yet? Because a vacuum pretty eliminates dust - with no air, dust just falls towards either the ground (if it is uncharged), or towards a positive or negatively charged surface (if the dust particle itself is charged).
Re: Moore’s Law is dead – Long live the chiplet
#59Unless I’m missing something, the article did mention Moore’s law proper with transistor density doubling every 18 months, but then meandered to talk about other things. M1 has 16 billion transistors thanks to TSMC. Each new node has delivered on Moore’s law with AMD and Apple. I don’t doubt that Moore’s law will stop. I can even say that it Moore’s law may have failed from time to time, but the spirit of the law liv…
Re: Moore’s Law is dead – Long live the chiplet
#60Even if the Moore's law is not dead, single-thread performance and clock frequency have plateaued 10 years ago. This is the key factor. Because of heating even if you squeeze more transistors onto a chip you need to reduce the clock, so even if you may get higher computational throughput the latency will go down. And this is another argument for chiplets or any other alternative computational architectures.
https://www.cpubenchmark.net/singleThread.html
It's amazing how often this is parroted. Anyone with a passing familiarity with the numbers knows this is actually not true at all.
Better caching, branch prediction, plus vast amounts of SRAM. There's been a slow & steady increase in the vast variety of single threaded workloads grouped together by "instructions per clock."
Both at the peak of the voltage frequency curve for workstations & overclocking, the apex of the optimization curve for data centre, and especially at the bare minimum for mobile devices with idle workloads.
Yes, it's a small fraction of the old days. It's still double in 10 years.
And as anyone who's migrated from an Intel Mac to Apple Silicon knows, "merely doubling" is a LOT.