51–60 of 81 posts
How hard is it to migrate a design from 40nm to 28nm? Can this be automated?
Yes, much more than from 28 to 22 or 16. 40nm+ are planar transistors, and below are FinFETs
It reminds me of how this backwards way of thinking seems to have infested everyone's heads; that stuff has to be, or make use of, the very latest technology available, or it will be useless junk that barely works.
Thanks TSMC... when will you release a HV version of 28nm? Oh... never, because you transitioned to bottom poly at 40nm. How is your automotive eFlash at 28nm... oh, you're still working on it (since 2018)? Well, guess we won't have many display drivers (or displays) or autos then, or maybe marketing should pull their heads out and smell the roses. I mean, I get it. Most things should transition to 28nm on 300mm wafe…
Seems like the automotive industry is gonna be the one to have to blink here. I’m not intimately involved in the details of the industry but didn’t the automotive industry already try to pass their risk onto TSMC by cancelling contracts early on into covid and we’re already told to get to the back of the line when they wanted their chip orders again? If TSMC has enough demand to sell everything they make, they don’t…
Too many mainstream articles on semiconductors are just vague, uncheckable facts combined with filler that seems to have been suggested by Intel's PR department, even when Intel is totally irrelevant. Intel needs delicious subsidies!
How hard is it to migrate a design from 40nm to 28nm? Can this be automated?
Even if you ignore all the other complications when switching nodes (and there are a LOT!), this alone prevents simple downscaling of circuits. It is very likely that after downscaling at least part of the interconnects have to be rerouted.
As for automation of that task: It's the traveling salesman problem in disguise. Which means that you CAN automate it, and there exists software for that purpose, but the result are hardly optimal, and most likely leave quite a lot of possible performance on the table.
Add to that all the other necessary changes when switching nodes, and it becomes fairly obvious that switching nodes, even if only porting 1:1, is a massive effort that can easily span YEARS.
Which is to say that there isn't the profitability (or even the equipment) to build new capacity for such old nodes I'm disappointed that nobody really bothers to work on the cost reduction side of older nodes. I kind of thought we could easily and cheaply turn out, say, 32nm chips by the million.
The price of ongoing power consumption probably dwarfs the price of the chip itself in terms of cost of ownership in most cases.
E.g. an i7 draws 65W at idle, or about 1.5kWh/day. That's ~$0.20/day where I live, about $6/month or $36/year. Max draw is ~4x that. I've probably paid more in power to run my CPU than I paid for the CPU itself.
Which is to say that there isn't the profitability (or even the equipment) to build new capacity for such old nodes I'm disappointed that nobody really bothers to work on the cost reduction side of older nodes. I kind of thought we could easily and cheaply turn out, say, 32nm chips by the million.
I'm not an expert, but my layman's understanding is that the lower sizes and new production techniques decrease power consumption. The price of ongoing power consumption probably dwarfs the price of the chip itself in terms of cost of ownership in most cases. E.g. an i7 draws 65W at idle, or about 1.5kWh/day. That's ~$0.20/day where I live, about $6/month or $36/year. Max draw is ~4x that. I've probably paid more in…
Which is to say that there isn't the profitability (or even the equipment) to build new capacity for such old nodes I'm disappointed that nobody really bothers to work on the cost reduction side of older nodes. I kind of thought we could easily and cheaply turn out, say, 32nm chips by the million.
I'm not an expert, but my layman's understanding is that the lower sizes and new production techniques decrease power consumption. The price of ongoing power consumption probably dwarfs the price of the chip itself in terms of cost of ownership in most cases. E.g. an i7 draws 65W at idle, or about 1.5kWh/day. That's ~$0.20/day where I live, about $6/month or $36/year. Max draw is ~4x that. I've probably paid more in…
I don't know which chip you're talking about but a 12900K idles at ten watts.
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That's scary - I have a < 1 yr old Tesla model Y and it is embarrassing how underpowered the tablet that controls basically every part of the car is.
FWIW, Tesla is one of the few companies that actually put decent processors in their cars: in lieu of a cruddy, off-the-shelf ARM CPU, they use Intel (and more recently, Ryzen) x86-based machines. Their performance relative to the Cortex processors running in competitors is enormous, it must be slow due to the volume of processes Tesla is actually running onboard.
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No, it means there will be even worse touchscreens because now automakers can't afford silicon that might actually power a tablet.
That's scary - I have a < 1 yr old Tesla model Y and it is embarrassing how underpowered the tablet that controls basically every part of the car is.
The last vehicle I bought, I turned down several vehicles because many of the internal environmental controls were through a touchscreen, and the touchscreen was so slow and bad I was honestly astonished that they were selling it.
The salesman tried to downplay it but I still walked out of the ford dealership 100% because of their shitty controls/touchscreen.
Ended up buying a car with old fashioned buttons and knobs, much happier.
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Analog isn't just RF; PHYs for weird protocols is a giant component of the space, as well as power monitoring/management. The changes in how voltage/resistance/capacitance/etc work at each node for a given layout is the heavy lift. Additionally, you very, very rarely have the antenna on chip, and the analog bits even for RF are more signal conditioning that isn't typically modeled like waveguides, but instead more li…
> Additionally, you very, very rarely have the antenna on chip I didn't mean that there would be components intentionally serving as antennae in a design; more that you might be choosing analog trace lengths in e.g. a modem, or SDR ADC, to minimize harmful analog-domain interference at your bus frequency — i.e. to increase SNR, you're trying to make your traces be as little like an antenna as possible for the frequen…
Not an antenna per se, but RF ICs often contain silicon inductors tuned for the operating frequency of the transceiver. Shrinking those down would retune the circuit for a higher frequency.