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A New Golden Age for Computer Architecture

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Re: A New Golden Age for Computer Architecture

#51

Post by Symmetry »

gpderetta wrote: post #39
Symmetry wrote: post #36

Earlier quoted context omitted.

Many people describe the uOps inside a modern x86 as RISC-like and that's a good analogy. The internals really are much more similar to a RISC pipeline than older microcoded processors were. But it is still just an analogy because you're right about architecture versus microarchitecture.

but microcoding has existed for ever and while uops is probably a very specialized form of microcoding, it still not a new thing. Also I do not think uops are fixed size as IIRC they can take a variable number of slots in the uop cache, and fix size instructions is pretty much one of the only two remaining differentiating RISC features. The internal x86 microarchitecture is also not load-store, the other one RISC fea…

Everything I've read about Intel uOps says that they're fixed size[1]. Now, the size isn't a power of 2 multiple of a byte like you'd see in a RISC design. I seem to recall some Intel architecture with 83 bit uOps? But it is fixed. And the uOp caches for both Intel and AMD are fixed size. Haswell stores 1.5k uOps[2] and Zen 2k[3] for instance.

But the important thing is that uOps are much higher level than microcode instructions. Except for the odd encoding size they would make a lot of sense as an early RISC ISA. Now, they expose a lot of the odd corner cases of the underlying architecture in a way that no modern ISA would but the original Berkeley RISC had branch delay slots and followed the philosophy that you'd just recompile the code when the ISA changes.

I'm at the edge of my knowledge here but I understand that microcoded instructions would tend to be much lower level, being things like read from memory to such and such an internal buffer. By contrast uOps do specify registers or constants, though they do so (post-rename) in terms of physical rather than architectural registers. But the decision on whether to get that arguments from the physical register or the bypass network is still made further down the pipe as with a RISC processor.

Is the analogy perfect? No, of course not. No analogy ever is. But I do think it illuminates more than it misleads for people learning about the evolution of processors - just as long as people can keep architecture and micro-architecture straight.

[1]https://en.wikichip.org/wiki/micro-operation for instance. [2]https://www.realworldtech.com/haswell-cpu/2/ [3]https://en.wikichip.org/wiki/amd/microarchitectures/zen%2B#M...

Re: A New Golden Age for Computer Architecture

#52

Post by robin_reala »

ChucklesNorris wrote: post #50
robin_reala wrote: post #44

Earlier quoted context omitted.

Every country already taxes people on the miles they drive, as every country has a fuel tax.

The difference is pay at the pump or pay via what your car's embedded GPS is reporting. GPS also allows them to know when and where you were speeding, and since Sweden went cashless, they can simply deduct the fines from your bank account. Compliance is irrelevant. If having a GPS device on your person becomes law, then avoiding the tax by riding a bicycle, walking, riding a horse etc is defeated.

Could you link through to the article you read this in, because I live in Sweden, own a car, and have not heard or seen anything about this.

Re: A New Golden Age for Computer Architecture

#53

Post by vanderZwan »

Symmetry wrote: post #41
gbrown_ wrote: post #16

Earlier quoted context omitted.

I agree, my concern is where do DSAs go in a few generations? How many efficiency/performance gains can be had before hitting the same limits hampering general purpose processors today?

A DSA is only going to be an order of magnitude or two more performant than a general computer on any given process node. They'll certainly slow down at the same time general purpose CPUs slow down. The thing is it makes more sense to design and include them in a world where transistors are potentially getting cheaper without getting better because a finite amount of engineering effort will be stretched across a long…

Does that also imply a potential power savings of an order of magnitude or two? Because then it becomes a lot more obvious that the demand for them will be there in mobile phones and laptops at least.

Re: A New Golden Age for Computer Architecture

#54

Post by Symmetry »

vanderZwan wrote: post #53
Symmetry wrote: post #41

Earlier quoted context omitted.

A DSA is only going to be an order of magnitude or two more performant than a general computer on any given process node. They'll certainly slow down at the same time general purpose CPUs slow down. The thing is it makes more sense to design and include them in a world where transistors are potentially getting cheaper without getting better because a finite amount of engineering effort will be stretched across a long…

Does that also imply a potential power savings of an order of magnitude or two? Because then it becomes a lot more obvious that the demand for them will be there in mobile phones and laptops at least.

Yes, it does. And that's a big part of the push for dedicated co-processors that we've seen in SoCs.

Re: A New Golden Age for Computer Architecture

#55

Post by jabl »

mpweiher wrote: post #42
4thaccount wrote: post #29

Earlier quoted context omitted.

Never heard of SOAR. It would be pretty sweet though to have a powerful & multi-core chip running a Smalltalk OS that could do something with all the cores. I'd also like to see kOS from Arthur Whitney if he ever finishes it, although I'd never be able to afford any of their products.

https://www2.eecs.berkeley.edu/Pubs/TechRpts/1986/CSD-86-287... https://www.deepdyve.com/lp/association-for-computing-machin... http://digitalassets.lib.berkeley.edu/techreports/ucb/text/E... Looking at the results, they say that hardware tag-checking for integer arithmetic and register windows for fast method calls were the two most important features of the design, nearly doubling performance. I wonder if that stil…

Nowadays the thinking seems to be that register windows were a mistake (e.g. in SPARC), and newer designs such as RISC-V or Aarch64 don't do it.

Re: A New Golden Age for Computer Architecture

#56

Post by gpderetta »

Symmetry wrote: post #51
gpderetta wrote: post #39

Earlier quoted context omitted.

but microcoding has existed for ever and while uops is probably a very specialized form of microcoding, it still not a new thing. Also I do not think uops are fixed size as IIRC they can take a variable number of slots in the uop cache, and fix size instructions is pretty much one of the only two remaining differentiating RISC features. The internal x86 microarchitecture is also not load-store, the other one RISC fea…

Everything I've read about Intel uOps says that they're fixed size[1]. Now, the size isn't a power of 2 multiple of a byte like you'd see in a RISC design. I seem to recall some Intel architecture with 83 bit uOps? But it is fixed. And the uOp caches for both Intel and AMD are fixed size. Haswell stores 1.5k uOps[2] and Zen 2k[3] for instance. But the important thing is that uOps are much higher level than microcode…

FWIW, Agner says that if a uop has multiple constants (for example an address and an immediate), it will borrow up to 32 bits from the next uop cache slot.

Encoding constants in the instructions themselves is a very non-RISC thing BTW.

Re: A New Golden Age for Computer Architecture

#57

Post by DannyB2 »

Symmetry wrote: post #35
simula67 wrote: post #8

> Today, 99% of 32-bit and 64-bit processors are RISC > Concluding this historical review, we can say the marketplace settled the RISC-CISC debate; CISC won the later stages of the PC era, but RISC is winning the post-PC era It is clear that his assessment is right, but isn't the 99% number too high ? Servers, laptops and desktops still run x86 and they are CISC ( unless you are counting x86 as RISC based on microcod…

There's an x86 processor in your desktop, but there are many more RISC processors doing things like controlling your hard drive. If you buy an AMD processors there's even an ARM core inside the x86 processor in the Platform Security Processor. Add in all the microwaves, routers, the many processors in your car, and so on and 99% seems a bit high to me but not unreasonable.

Smart TVs, Digital Cameras, Thermostats, Wristwatches, Phones, Tablets, Printers, Google Home devices, Amazon Echo devices, TV sticks (Chromecast, Firestick etc), Ring doorbells, security devices, etc, . . .

Anything (like a Printer) with a web based interface, having a micro web server within the device.

There are VASTLY more ARM and other architecture chips than there are x86/64 chips around you right now. Possibly even in the computer monitor you're reading this on. The desk phone in your office.

Just about anything that has any kind of a screen with menu system.

Re: A New Golden Age for Computer Architecture

#59

Post by blattimwind »

Symmetry wrote: post #36
gpderetta wrote: post #33

Earlier quoted context omitted.

x86 is not RISC by any meaningful definition. RISC vs CISC has always been about architecture, not microarchitecture. Breaking down instructions into microinstructions is as almost as old as the CPU itself and predates the CISC/RISC nomenclature by decades.

Many people describe the uOps inside a modern x86 as RISC-like and that's a good analogy. The internals really are much more similar to a RISC pipeline than older microcoded processors were. But it is still just an analogy because you're right about architecture versus microarchitecture.

> Many people describe the uOps inside a modern x86 as RISC-like and that's a good analogy.

Not really. Micro-Ops are typically very large (100+ bits wide) where each bit can be thought of as directly controlling a specific function in an EU. They can do things in parallel; the frontend may emit only one uop for more than one ISA instruction, they can contain constants, they're kinda-of variable-length in some microarchitectures. Overall they're very un-RISC-y.

Overall the whole RISC/CISC debate is pretty much meaningless and has been for decades. Many folks superimpose their own superstitions about unrelated issues (e.g. "PC server" vs "UNIX server" seems a popular one), but at the end of the day pretty much all high-performance cores look fairly similar, regardless of ISA.

Re: A New Golden Age for Computer Architecture

#60

Post by ansible »

Symmetry wrote: post #37
ansible wrote: post #21

Earlier quoted context omitted.

Reaching "the end of Moore's Law" is a super big deal, and I still don't understand why people aren't worried about it more in general. It will cause a crash in the entire tech industry, which will throw the global economy into a depression.

I'm somewhat comforted by the fact that there are fundamental physical limits to computational efficiency[1] which we aren't at yet. MOSFETs look to be just about played out but there are tons of other potential computational substrates. Carbon nanotube transistors, photonics, nano-rod logic, magnetic coupling, DNA computing, etc. We're in for a big interregnum before we get a new paradigm working better than our exi…

All of the techs you have mentioned are potentially great, but none are close to ready for widescale production.
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