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AMD Discloses Initial Zen 2 Details

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Re: AMD Discloses Initial Zen 2 Details

#51

Post by screye »

djsumdog wrote: post #47

I hope AMD has something on their video chip line-up against nVidia as well. I'm curious if they knew nVidia was working on ray-tracing and plan to implement the same API or if they have some other tech they have up their sleeve they've been working on vendors with. I hate how nVidia has such a monopoly on the video chip market. Who knows, maybe Intel will finally get back into the gamer 3D market and we might finall…

I hate the Cuda monopoly in machine learning right now. I hope some of the mature libraries (TF, Pytorch) start officially supporting AMD GPUs.

Nvidia is looting customers that want to use GPUs for Machine Learning on the cloud (like AWS, GCP)

Re: AMD Discloses Initial Zen 2 Details

#52

Post by chime »

SlowRobotAhead wrote: post #31
bluecalm wrote: post #15

Damn, with 64core/128 threads becoming widely available a lot of Windows software will have to be updated to use that because of "64 bits should be enough for everybody" kind of decision in Windows when implementing affinity. You can't get more than 64 threads in OpenMp when compiling with MinGW and you can get it with Clang but the implementation wasn't very efficient when tested it. I suspect the problem is there i…

Last I saw MS SQL licensing among others like it have a pricing structure per CPU core... That’s going to need to be modified I think!

Doubt they will go away from per core pricing. Most SQL servers are VMs so you can assign as many cores as you want. I do expect them to give bulk pricing for more cores. So 4 core=$x, 16cores=$3x, 64cores=$10x.

Re: AMD Discloses Initial Zen 2 Details

#53

Post by Symmetry »

s3cur3 wrote: post #14
bhouston wrote: post #7

64 cores with 128 threads. Hope that comes to threadripper. I love and for bringing back competition to the CPU market. We've bought a ton of amd machines in the last year, great bargains in our space.

Benchmarks on the 32-core TR are... disappointing, to say the least.[1] If you’re purely compute bound, it can be a win over the 16-core version, but if memory access is a factor, it’s a wash due to the extra hops to memory. And to my mind, there are very few pure-compute applications that wouldn’t benefit more from AVX2 and the like... in which case a cheaper Intel CPU would still wipe the floor with the 32-core chi…

I suspect the main problem I tackle at work, robotic grasp planning, could make use of all those threads despite the bandwidth constraint. Now if only someone would put an Epyc in an industrial PC...

Re: AMD Discloses Initial Zen 2 Details

#54

Post by mbell »

Anyone know why we aren't seeing Intel/AMD go the 'ultra-wide' route that we've seen in ARM processors? (Apple's in particular)

e.g. we've seen Apple's A12 processor expand ALU's from 4->6 and what seems like a strong focus on cache latency and these changes seem to be rather beneficial in real code. Why aren't we seeing the same from Intel / AMD? As someone whom isn't particularly well informed on the topic my guess is that AMD/Intel are scared of selling a wider-core but lower clocked CPU given how much marketing is attached to clock speed, but I imagine there are architectural issues as well.

Re: AMD Discloses Initial Zen 2 Details

#55

Post by shmerl »

screye wrote: post #51
djsumdog wrote: post #47

I hope AMD has something on their video chip line-up against nVidia as well. I'm curious if they knew nVidia was working on ray-tracing and plan to implement the same API or if they have some other tech they have up their sleeve they've been working on vendors with. I hate how nVidia has such a monopoly on the video chip market. Who knows, maybe Intel will finally get back into the gamer 3D market and we might finall…

I hate the Cuda monopoly in machine learning right now. I hope some of the mature libraries (TF, Pytorch) start officially supporting AMD GPUs. Nvidia is looting customers that want to use GPUs for Machine Learning on the cloud (like AWS, GCP)

There are some efforts to improve the situation: https://www.phoronix.com/scan.php?page=news_item&px=Red-Hat-...

Re: AMD Discloses Initial Zen 2 Details

#56

Post by hmottestad »

mbell wrote: post #54

Anyone know why we aren't seeing Intel/AMD go the 'ultra-wide' route that we've seen in ARM processors? (Apple's in particular) e.g. we've seen Apple's A12 processor expand ALU's from 4->6 and what seems like a strong focus on cache latency and these changes seem to be rather beneficial in real code. Why aren't we seeing the same from Intel / AMD? As someone whom isn't particularly well informed on the topic my guess…

Is Apple ahead of x86/64 on width?

The A10X article on anandtech seemed to imply that every other ARM architecture was far behind on width while Apple was mostly on par (or slightly behind) x86/64.

Re: AMD Discloses Initial Zen 2 Details

#57

Post by jacquesm »

celrod wrote: post #32
beatgammit wrote: post #12

This is a pretty bold change and really makes Intel chips less appealing. With the recent kernel changes for Intel's Spectre issues and this chip coming up, I think it's a distinct possibility that AMD will take back a ton of marketshare in the server space. If these chips really do have a ~25% performance gain over Ryzen (not counting IPC gains), I might just upgrade, and I think a lot of other people are in the sam…

Most of what I do is floating point operations, so I'll see >100% performance gains with the avx boost. I will upgrade.

Any chance your workload would see a benefit from porting the code to a GPU?

Re: AMD Discloses Initial Zen 2 Details

#58

Post by astrodust »

_wmd wrote: post #48
astrodust wrote: post #41

Earlier quoted context omitted.

What's disappointing is that none of the major cloud vendors has made any real commitments to AMD, at least none that I've seen. If speculative execution is a problem and you need to give each VM its own exclusive cores, great when you can source parts with 64+ cores on them!

AWS began releasing a new AMD generation a few weeks ago.. https://aws.amazon.com/blogs/aws/new-lower-cost-amd-powered-...

Fantastic news. Thanks for the link!

Re: AMD Discloses Initial Zen 2 Details

#59

Post by snuxoll »

blattimwind wrote: post #22
snuxoll wrote: post #18

Earlier quoted context omitted.

If you’re wanting a storage box usually it’s just less headache to buy used server gear off eBay. Plenty of bays, DDR3 RDIMM’s are cheap, and power efficient ivy/sandy bridge systems are finally in affordable price ranges. I’m the kind of person that lurks in /r/homelab though - so I’ve also got a 25U rack to keep all my gear. If you want a tower to stuff in a corner things get more dicey.

2011-1 systems really aren't that power efficient. 16 DIMMs, 2 sockets will draw ~120 W idle .

Don’t populate all 16 DIMM’s unless you need that much memory? Both my single-socket R320 and dual-socket R520 idle at 70W each with 6 DIMM’s installed.

Most people probably don’t need the gobs of memory I have either. A R520 with one socket populated and 2x8 or 16GB dual-ranked RDIMM’s would be more than sufficient.

Re: AMD Discloses Initial Zen 2 Details

#60

Post by mbell »

hmottestad wrote: post #56
mbell wrote: post #54

Anyone know why we aren't seeing Intel/AMD go the 'ultra-wide' route that we've seen in ARM processors? (Apple's in particular) e.g. we've seen Apple's A12 processor expand ALU's from 4->6 and what seems like a strong focus on cache latency and these changes seem to be rather beneficial in real code. Why aren't we seeing the same from Intel / AMD? As someone whom isn't particularly well informed on the topic my guess…

Is Apple ahead of x86/64 on width? The A10X article on anandtech seemed to imply that every other ARM architecture was far behind on width while Apple was mostly on par (or slightly behind) x86/64.

Apple doesn't release the details but Anandtech estimates A12 has 13 execution ports (https://www.anandtech.com/show/13392/the-iphone-xs-xs-max-re...). I'm guessing the numbers for 6 ALU ports are more accurate than the overall since it's hard to blackbox determine the port sharing structure. Recent Intel / Zen have 4 ALU ports AFAIK.
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