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Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

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441–450 of 567 posts

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#441

Will there be any way to disable or block the upcoming patches and keep the performance for those of us who really just don't have any reason to care about inter-process information leakage on our personal computers? Edit: I'm (also) wondering about Windows, in case anyone knows yet.

Please just don't. It isn't worth the pain and risk just to have a little faster system. Maybe you don't care about this patch, but you will need others that are dependent on it. Just patch.

> Please just don't. It isn't worth the pain

No, it very much is.

> and risk

No, there is no risk. I already run everything as admin.

> just to have a little faster system.

5-30% is not "a little".

> Maybe you don't care about this patch

Indeed. And I expect many other power users also don't (but regardless, this is irrelevant).

> but you will need others that are dependent on it.

Well when that actually becomes a problem I will act accordingly. If more patches like this pop up I obviously won't install any of them. If there's a patch for a drive-by browser exploit depending on this, that will obviously be a different story.

> Just patch.

Hell no. My patching this makes my computer slower while providing exactly zero benefit to anyone.

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#443

When pondering whether I should be grumpled about this situation or accept it as "just how it goes", I wonder if Intel would be OK with me giving them up to 30% less money after agreeing to 100% before walking out the Intel shop without prejudice.

I don't know if their will be a recall/class-action lawsuit/whatever. But clearly there is a difference between making a mistake in what must be one of the most complicated consumer products on the one hand, and intentionally violating the terms of an agreed-upon contract?

Tl/DR: Intent matters.

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#444

Earlier quoted context omitted.

Their competitors are also affected. Also a 30% decrease is also equivalent to setting Moore's law back 7 months. A 5% loss is only setting it back 1 month. I know that's a bit of a naive calculation. But the point is computing power has long operated in an exponential domain. So big differences in absolute numbers aren't necessarily a big deal.

CPU speed hasn't followed Moore's law since 2003ish. (Number of transistors is still following Moore's law, but that doesn't necessarily directly help you when your program is suddenly 3-30% slower.)

A CPU from 2017 is going to run your programs a hell of a lot faster than one from 2003. Even if they technically have the same clock speed. Look at benchmarks for instance: https://www.cpubenchmark.net/high_end_cpus.html

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#445

Earlier quoted context omitted.

> They really dislike insider trading, it's one of the few things where even rich people can get imprisoned -- and the typical jail sentence has been steadily climbing up for decades now. Insider trading, like many white-collar crimes, exists primarily for its value as a weapon. There is nothing actually illegal about the act of selling a stock; it's all about casting aspirations as to intent and who-knew-what-when.…

The expression you're looking for is "casting aspersions."

Heh, you're right. I promise I knew that. ;) It's too late to fix the typo now, but I appreciate the correction.

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#446

Earlier quoted context omitted.

What is a good thing...?

Martha Stewart did jail time for insider trading. Turns out the SEC isn't messing around, and they don't hand out community service, probation and fines for this stuff.

Ahhhh, solid reference. At first I thought you were saying insider trading was a good thing and I was thoroughly confused.

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#447

Literally just read here yesterday how the CEO dumped majority of his shares. So Shiesty. https://news.ycombinator.com/item?id=16055851

Don't spread conspiracy theories. It's absolutely impossible for the most visible executive of one of the largest firms to engage in insider trading in such an obvious fashion and get away with it. At this level, there is always a paper trail of who knew what when. There are internal and external audits if any suspicions arise. Plus there are sever penalties, both civil (in the employment contract) as well as crimina…

I think we're going to find in the coming years that there is a lot of white collar crime going on at any time. It seems like it would be foolhardy to attempt this stuff, but greed compels people to do stupid things all the time. Wealthy C-suite people are not totally immune to that.

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#448
post #49

Here are some numbers quantifying the problem. Big caveats apply as they are very preliminary, but the hit due to the software patches looks extremely significant: https://www.phoronix.com/scan.php?page=article&item=linux-41...

Superficially, it seems like the performance hit mostly scales with IOPS or transactions per second, which might have some pretty serious implications for performance/dollar in the kinds of intensive back-end applications where Intel currently dominates and AMD is trying to make inroads with EPYC.

All the Oracle DBAs out there are in for some suffering. Forget the cost of 30% extra compute, what about the 30% increase to Oracle licensing?

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#449

Earlier quoted context omitted.

DAX doesn't appear related here at all. That is about bypassing the page cache for block devices that don't need one. That doesn't move anything from kernel land into userspace, certainly not in the app's process in userspace anyway.

If you bypass the page cache you do not have read()/write() and mmap you avoid the syscall overhead. This matters a lot for high IOPs devices. Also these new fangled devices claim support word cache line sync using normal cpu flush instructions. Also avoiding fsync syscall.

One does not follow the other. Where are any references to how this will let you bypass read & write? User-space applications are still interacting with a filesystem, which they access via read/write and not a block device.

There's no talk in the DAX information about how this results in a zero-syscall filesystem API, and I'm not seeing how that would ever work given there would then be zero protections on anything. You need a handle, and that handle needs security. All of that is done today via syscalls, and DAX isn't changing that interface at all. So where is the API to userspace changing?

Re: Intel Confronts Potential ‘PR Nightmare’ With Reported Chip Flaw

#450
After the fix, will device drivers still have the user process mapped into their address space?

If not, then the fix may expose many driver bugs (where driver accessed user space directly instead of through copy_from_user()), making the whole thing even more painful.

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