AMD claims Arm ISA doesn't offer efficiency advantage over x86 • Hacker News Board

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#431

Post by jabl » Wed, Sep 10, 2025, 6:03 AM UTC

jabl wrote: post #339

exmadscientist wrote: post #2

This is an entirely uncontroversial take among experts in the space. x86 is an old CISC-y hot mess. RISC-V is a new-school hyper-academic hot mess. Recent ARM is actually pretty good. And none of it matters, because the uncore and the fabrication details (in particular, whether things have been tuned to run full speed demon or full power sipper) completely dominate the ISA. In the past x86 didn't dominate in low powe…

> Or perhaps AMD will let x86 fade away. I agree with what you write otherwise, but not this. Why would AMD "let x86 fade away"? They are one of the two oligolistic CPU providers of the x86 ecosystem which is worth zillions. Why should they throw that away in order to become yet another provider of ARM (or RISC-V or whatnot) CPUs? I think that as long as the x86 market remains healthy, and AMD is in a position to com…

> oligolistic

I meant to write "oligopolistic", of course.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#432

Post by menaerus » Wed, Sep 10, 2025, 7:23 AM UTC

exmadscientist wrote: post #429

menaerus wrote: post #335

Earlier quoted context omitted.

> But Apple cannot beat Intel/AMD in single-thread performance It's literally one of the main Apple M chips advantage over Intel/AMD. At the time when M chip came out, it was the only chip that managed to consume ~100GB/s of MBW with just a single thread. https://web.archive.org/web/20240902200818/https://www.anand... > From a single core perspective, meaning from a single software thread, things are quite impressive…

Memory bandwidth is an uncore thing, not a core thing. Apple's uncore is amazing. But that means they can feed their cores well, not that their cores are actually the absolute best performers when all the stops are pulled out.

Yes, it is core and uncore, which we call a CPU, and you said "But Apple cannot beat Intel/AMD in single-thread performance." which is incorrect for the reasons above.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#433

Post by formerly_proven » Wed, Sep 10, 2025, 7:47 AM UTC

torginus wrote: post #289

formerly_proven wrote: post #287

Earlier quoted context omitted.

> M-series chips have closely integrated RAM right next to the CPU, while AMD makes do with standard DDR5 far away from the CPU, which leads to a huge latency increase 2/3rds the speed of light must be very slow over there

I mean at 2GHz, and 2/3c, the signal travels about 10cm in 1 clock cycle. So it's not negligible, but I suspect it has much more to do with signal integrity and the transmission line characteristics of the data bus. I think since on mobile CPUs, the RAM sits right on top of the SoC, very likely the CPUs are designed with a low RAM latency in mind.

> I mean at 2GHz, and 2/3c, the signal travels about 10cm in 1 clock cycle. So it's not negligible

That's 0.5ns - if you look at end-to-end memory latencies, which are usually around 100ns for mobile systems, that actually is negligible, and M series chips do not have particularly low memory latency (they trend higher in comparison).

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#434

Post by legacynl » Wed, Sep 10, 2025, 8:28 AM UTC

aurareturn wrote: post #424

legacynl wrote: post #402

Earlier quoted context omitted.

Yeah but an AMD/Intel CPU supports many different types of configurations. Isn't it unfair to compare a chip that only supports one configuration with one that supports many? It feels to me like we're kind of comparing speeds between a personal automobile and a long haul truck. Yes, one is faster than the other, but that's meaningless, because both have different design considerations. A long haul truck has to be abl…

Yes because it’s still the fastest SoC running Windows. Further more, consumers don’t care if AMD and Intel have to go into more configurations. They care about what they’re buying for the money.

> Further more, consumers don’t care

Well, I'm a consumer, and I certainly care. But I get your point that a lot of people just want a machine that allows them to browse for 10 hours without needing to be charged, and don't really care about anything else.

But do you also get my point? that on some level the chips/hardware are so different that it's like comparing apples to oranges?

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#435

Post by christkv » Wed, Sep 10, 2025, 11:25 AM UTC

hnuser123456 wrote: post #397

VHRanger wrote: post #389

Earlier quoted context omitted.

huh, it seems like the M4 pro can hit >400GB/s of RAM bandwidth whereas even a 9950x hits only 100GB/s. I'm curious how that is; in practice it "feels" like my 9950x is much more efficient at "move tons of RAM" tasks like a duckDB workload above a M4. But then again a 9950x has other advantages going on like AVX512 I guess?

Yes, the M-series chips effectively use several "channels" of RAM (depending on the tier/size of chip) while most desktop parts, including the 9950x, are dual-channel. You get 51.2 GB/s of bandwidth per channel of DDR5-6400. You can get 8-RAM-channel motherboards and CPUs and have 400 GB/s of DDR5 too, but you pay a price for the modularity and capacity over it all being integrated and soldered. DIMMs will also have…

Or you can get a strix halo 395+ that has 8 memory channels with a max of 128gb of ram. I think it does around 400 GB/s

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#436

Post by sylware » Wed, Sep 10, 2025, 1:45 PM UTC

sylware wrote: post #321

RISC-V has no PI lock like ARM or x86 and x86_64. RISC-V has to start to seriously defend itself, because it is a death sentence for ARM ISA and and could start to cast shadows on x86_64 in some areas slowly but surely. Some people will try to bring it down, hard. If you stick to core rva22+ (core RISC-V ISA), RISC-V is good enough to replace all of them, without PI lock, and with a global standard ISA, software may…

Oh, regarding GPUs, AMD started to experiment on userland _hardware_ ring buffers... I don't know how they will handle their scarse VM id resources... the kernel may end up "only" mmaping event/command ring buffers and data dma/doorbells buffers with an "IRQ" event file descriptor.

We are talking a "near 0-driver"... but they will have to be very confident in their GPU robustness to do that, not to mention 3D pipeline programming from those userland _hardware_ buffers will have to be really simple and directly "ready" to work.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#437

Post by hnuser123456 » Wed, Sep 10, 2025, 4:09 PM UTC

christkv wrote: post #435

hnuser123456 wrote: post #397

Earlier quoted context omitted.

Yes, the M-series chips effectively use several "channels" of RAM (depending on the tier/size of chip) while most desktop parts, including the 9950x, are dual-channel. You get 51.2 GB/s of bandwidth per channel of DDR5-6400. You can get 8-RAM-channel motherboards and CPUs and have 400 GB/s of DDR5 too, but you pay a price for the modularity and capacity over it all being integrated and soldered. DIMMs will also have…

Or you can get a strix halo 395+ that has 8 memory channels with a max of 128gb of ram. I think it does around 400 GB/s

From what I see Strix Halo has a 256 bit memory bus, which would be like quad channel ddr5, but it's soldered so can run at 8000mt/s, which comes out to 256 GB/s.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#438

Post by samus » Wed, Sep 10, 2025, 9:13 PM UTC

BoredPositron wrote: post #371

samus wrote: post #320

Earlier quoted context omitted.

The problem is that they are slowly losing the mobile markets, while their usual markets are not growing as they used to. AMD is less vulnerable to the issues that arise from that because they are fabless, and they could pivot entirely to GPU or non-x86 markets if they really wanted to. But Intel has fabs (very expensive in terms of R&D and capex) dedicated to products for desktop and server markets that must continu…

The markets didn't really budge. Apple only grew 1% in the traditional PC market (desktop/notebook) over the last 5 years and that's despite a wave of new products. The snapdragons are below 1%...

And that's fine for them since they have also have their mobile platform, which is arguably more important at this point.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#439

Post by christkv » Thu, Sep 11, 2025, 5:44 AM UTC

hnuser123456 wrote: post #437

christkv wrote: post #435

Earlier quoted context omitted.

Or you can get a strix halo 395+ that has 8 memory channels with a max of 128gb of ram. I think it does around 400 GB/s

From what I see Strix Halo has a 256 bit memory bus, which would be like quad channel ddr5, but it's soldered so can run at 8000mt/s, which comes out to 256 GB/s.

Yeah you are right still up from the other consumer platforms

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#440

Post by fwipsy » Thu, Sep 11, 2025, 7:10 AM UTC

ben-schaaf wrote: post #396

fwipsy wrote: post #385

Earlier quoted context omitted.

> If you want to measure how efficient a CPU core is you do so under full load. Higher wattage gives diminishing returns. Chips will run higher wattage under full load just to eke out a marginal improvement in performance. Therefore efficiency improves if the manufacturer chooses to limit the chip rather than pushing it harder. Test efficiency using whatever task the chip will be used for. For most ultralight laptops…

No, and that's exactly the point I'm making. If you try to measure ISA efficiency using a workload where the CPU is idle the vast majority of the time, then your power usage will be dominated by things unrelated to the ISA. To further hammer the point home, let me reduce do a reductio ad absurdum: The chip is still "in use" when its asleep. Sleeping your laptop is a typical usecase. Therefore how much power is used w…

You're not taking into account dynamic clock speeds, just "idle" and "load." Most CPUs have configurable TDP, and if you give them more power they will run more cores at a higher frequency. Suppose I measured the same laptop CPU under "full load" in two different computers at full load, but one is configured for a 30w TDP and the other is configured for a 40w TDP. The first PC will be more efficient, because you get diminishing returns for increased power. But it's the same CPU.

To go back to your original argument, you're claiming that x86 ISA is more efficient than ARM because a certain AMD chip beat certain M1/snapdragon chips at 50w. You can't draw that conclusion because the two chips may be designed to have peak efficiency at different power levels, even if the maximum power draw is the same. Likely the Snapdragon/M1 have better efficiency at 10W with reduced clock speed even if the CPU is not idling.

Hence my response: it doesn't make sense to talk about performance per watt, without also specifying the workload. Not only will different workloads use different amounts of power, they will also rely on different instructions which may give different ISAs or CPUs the edge.

Not to mention -- who even cares about ISA efficiency? What matters is the result for the product I can buy. If M1/snapdragon are able to match AMD on performance but beat it in battery life for my workloads, I don't care if AMD has better "performance per watt" according to your metric.