Hacker News Board Hacker News, browsed like a classic message board
Live data from Hacker News

AMD claims Arm ISA doesn't offer efficiency advantage over x86

techpowerup.com

Post reply on HN
Print view View original

421–430 of 446 posts

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#421

Post by adgjlsfhk1 »

devnullbrain wrote: post #362
torginus wrote: post #18

Earlier quoted context omitted.

I remember reading this Jim Keller interview: https://web.archive.org/web/20210622080634/https://www.anand... Basically the gist of it is that the difference between ARM/x86 mostly boils down to instruction decode, and: - Most instructions end up being simple load/store/conditional branch etc. on both architectures, where there's literally no difference in encoding efficiency - Variable length instruction has pretty…

> fixed-length instructions seem really nice when you're building little baby computers, but if you're building a really big computer, to predict or to figure out where all the instructions are, it isn't dominating the die. So it doesn't matter that much. The notebooks of TFA aren't really big computers.

they are. By "small" here, we're referring to the Core size, not the machine size. i.e. an in order, dual issue cpu is small, but a M1 chip is massive.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#422

Post by p_ing »

acdha wrote: post #408
p_ing wrote: post #393

Earlier quoted context omitted.

Neither macOS nor Windows use a hardware-based accelerator for memory compression. It's all done in software. Linux zram uses Intel QAT but that's only available on a limited number of processors. You seem to be under the mistaken impression that Microsoft cannot gear Windows to act differently based on the installed hardware (or processor). That's quite untrue.

It was software on Intel but they presumably added instructions with the intention of using them: https://asahilinux.org/docs/hw/cpu/apple-instructions/ > You seem to be under the mistaken impression that Microsoft cannot gear Windows to act differently based on the installed hardware (or processor). Definitely not - my point is simply that all of these things are harder and take longer if they have to support multip…

> Definitely not - my point is simply that all of these things are harder and take longer if they have to support multiple implementations and get other companies to ship quality implementations.

What's your source for it is "harder" or "takes longer"? #ifdef is a quite well known processor directive to developers and easy to use.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#423

Post by sylware »

thecosmicfrog wrote: post #380
sylware wrote: post #321

RISC-V has no PI lock like ARM or x86 and x86_64. RISC-V has to start to seriously defend itself, because it is a death sentence for ARM ISA and and could start to cast shadows on x86_64 in some areas slowly but surely. Some people will try to bring it down, hard. If you stick to core rva22+ (core RISC-V ISA), RISC-V is good enough to replace all of them, without PI lock, and with a global standard ISA, software may…

What is "PI lock"? A cursory web search didn't reveal much.

IP lock, my bad (in my native language it is the other way around).

Intellectual Property lock. ARM, x86(intel), x86_64(amd) have such extremely strong locks in countries where those are legal to be enforced.

It is said they literaly deny anybody else to use their ISAs unless there is a super strong power struggle and/or a giga-enormous amount of $$$ in the bargain.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#424

Post by aurareturn »

legacynl wrote: post #402
aurareturn wrote: post #400

Earlier quoted context omitted.

Let's say it would hypothethically possible to put an M4 in a regular pc. Wouldn't it lose performance just by doing that? Yes. But an M4 Max running macOS running Parallels running Windows on Arm is still the fastest Windows laptop in the world: https://browser.geekbench.com/v6/cpu/compare/13494385?baseli...

Yeah but an AMD/Intel CPU supports many different types of configurations. Isn't it unfair to compare a chip that only supports one configuration with one that supports many? It feels to me like we're kind of comparing speeds between a personal automobile and a long haul truck. Yes, one is faster than the other, but that's meaningless, because both have different design considerations. A long haul truck has to be abl…

Yes because it’s still the fastest SoC running Windows. Further more, consumers don’t care if AMD and Intel have to go into more configurations. They care about what they’re buying for the money.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#425

Post by acdha »

p_ing wrote: post #422
acdha wrote: post #408

Earlier quoted context omitted.

It was software on Intel but they presumably added instructions with the intention of using them: https://asahilinux.org/docs/hw/cpu/apple-instructions/ > You seem to be under the mistaken impression that Microsoft cannot gear Windows to act differently based on the installed hardware (or processor). Definitely not - my point is simply that all of these things are harder and take longer if they have to support multip…

> Definitely not - my point is simply that all of these things are harder and take longer if they have to support multiple implementations and get other companies to ship quality implementations. What's your source for it is "harder" or "takes longer"? #ifdef is a quite well known processor directive to developers and easy to use.

> What's your source for it is "harder" or "takes longer"?

Windows devices’ power management and battery life has been behind Apple since the previous century? If you think hardware support is a simple #ifdef, ask yourself how a compile-time flag can detect firmware updates, driver versions, or flakey hardware. It’s not that Apple’s hardware is perfect but that those are made by the same company so you don’t get Dell telling you to call Broadcom who are telling you to call Microsoft.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#426

Post by exmadscientist »

mojuba wrote: post #295
exmadscientist wrote: post #247

Earlier quoted context omitted.

Yes, Intel/AMD cannot match Apple in efficiency. But Apple cannot beat Intel/AMD in single-thread performance. (Apple marketing works very hard to convince people otherwise, but don't fall for it.) Apple gets very, very close, but they just don't get there. (As well, you might say they get close enough for practical matters; that might be true, but it's not the question here.) That gap, however small it might be for…

> Apple has a max-efficiency design that's excellent for personal computing. Intel/AMD have aging max-performance designs that do beat Apple at absolute peak... Can you explain then, how come switching from Intel MBP to Apple Silicon MBP feels like literally everything is 3x faster, the laptop barely heats up at peak load, and you never hear the fans? Going back to my Intel MBP is like going back to stone age computi…

I did not say "Intel is so good". I said "x86 peak single-thread performance is just a hair better than Apple M-series peak".

Pretty much everything else about the M-series parts is better. In particular, Apple's uncore is amazing (partly because it's a lot newer design) and you really notice that in terms of power management.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#427

Post by exmadscientist »

IshKebab wrote: post #334
imtringued wrote: post #304

Earlier quoted context omitted.

The core argument in RISC vs CISC has never been that you can't add RISC style instructions to a CISC. If anything, the opposite is true, because CISC architectures just keep adding more and more instructions. The argument has been that even if you have a CISC ISA that also happens to have a subset of instructions following the RISC philosophy, that the bloat and legacy instructions will hold CISC back. In other word…

It's not just the complex encodings though, there's also the variable instruction length, and the instruction semantics that mean you need microcode. Obviously they've done an amazing job of working around it, but that adds a ton of complexity. At the very least it's going to mean you spend engineering resources on something that ARM & RISC-V don't even have to worry about. This seems a little like a Java programmer…

> RISC-V don't even have to worry about

Except that RISC-V had to bolt on a variable-length extension, giving the worst of all possible worlds....

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#428

Post by exmadscientist »

yvdriess wrote: post #299
exmadscientist wrote: post #254

Earlier quoted context omitted.

Max-performance chips even introduce dead dummy transistors ("dark silicon") to provide a bit of heat sinking capability. Having transistors that are sometimes-but-rarely useful is no problem whatsoever for modern processes.

AFAIK the dark silicon term is specifically those transistors not always powered on. Doping the Si substrate to turn it into transistors is not going to change the heat profile, so I don't think dummy transistors are added on purpose for heat management. Happy to be proven wrong though.

My understanding is that pretty much every possible combination of these things is found somewhere in a modern chip. There are dummy transistors, dark transistors, slow transistors... everything. Somewhere.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#429

Post by exmadscientist »

menaerus wrote: post #335
exmadscientist wrote: post #247

Earlier quoted context omitted.

Yes, Intel/AMD cannot match Apple in efficiency. But Apple cannot beat Intel/AMD in single-thread performance. (Apple marketing works very hard to convince people otherwise, but don't fall for it.) Apple gets very, very close, but they just don't get there. (As well, you might say they get close enough for practical matters; that might be true, but it's not the question here.) That gap, however small it might be for…

> But Apple cannot beat Intel/AMD in single-thread performance It's literally one of the main Apple M chips advantage over Intel/AMD. At the time when M chip came out, it was the only chip that managed to consume ~100GB/s of MBW with just a single thread. https://web.archive.org/web/20240902200818/https://www.anand... > From a single core perspective, meaning from a single software thread, things are quite impressive…

Memory bandwidth is an uncore thing, not a core thing. Apple's uncore is amazing. But that means they can feed their cores well, not that their cores are actually the absolute best performers when all the stops are pulled out.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#430

Post by jml7c5 »

ux266478 wrote: post #392
jml7c5 wrote: post #283

Earlier quoted context omitted.

Other ARM laptops also have much worse SoCs, so it's not really apples-to-apples.

As someone else posted elsewhere in this thread, Asahi nets about 6.5 hours on a Macbook. Apples to apples the story is the same. It's really not that shocking. The effect of power management (or rather, when it's lacking) is very apparent when you do bare metal programming. The first thing you do when you finally get something booting is kill a battery in less than an hour with a while(true).

I think you may have misread that post. It said Linux was 5 hours, MacOS was 6.5 hours. There's a gap (Linux gets 77% the life of MacOS), but it's apparently not that significant.
Post reply on HN