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Intel Problems

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Re: Intel Problems

#401

Post by astrange »

ncmncm wrote: post #201
DreadY2K wrote: post #176

Earlier quoted context omitted.

Many people do code against some sort of VM, but there are still people writing code in C/C++/Rust/Go/&c that gets compiled to machine code and run directly. Also, even if you're running against a VM, your VM is running on an ISA, so performance differences between them are still relevant to your code's performance.

C, C++, Rust, & Go compile to an abstract machine, instead. It is quite hard these days to get it to do something different between x86, ARM, and Power, except relying on memory model features not guaranteed on the latter two; and on M1 the memory model apes x86's. Given a compatible memory model (which, NB, ARM has not had until M1) compiling for the target is trivial. The x86 memory model makes it increasingly hard…

> It is indefinitely hard to port code developed on x86 to a more relaxed memory model, so the overwhelming majority of such codes will never be ported.

Most code should just work, maybe with some tsan testing. There's other ways to test for nondeterminism e.g. sleep the different threads randomly.

It helps if you have a real end to end testsuite; for some reason all the developers I've met lately think unit tests are the only kind of tests.

Re: Intel Problems

#402

Post by saagarjha »

astrange wrote: post #400
saagarjha wrote: post #396

Earlier quoted context omitted.

Instruments exposes a fair number of counters, though–what's wrong with using it?

I actually recommend just using 'spindump' and reading the output in a text editor. If you just want to look through a callstack adding pretty much any UI just confuses things.

I am currently working on a native UI to visualize spindumps :(

Re: Intel Problems

#403

Post by astrange »

saagarjha wrote: post #402
astrange wrote: post #400

Earlier quoted context omitted.

I actually recommend just using 'spindump' and reading the output in a text editor. If you just want to look through a callstack adding pretty much any UI just confuses things.

I am currently working on a native UI to visualize spindumps :(

Well try not to get the user lost in opening and closing all those call stack outline views, I'd rather just scroll in BBEdit ;)

Re: Intel Problems

#404

Post by interpol_p »

mulmen wrote: post #377
interpol_p wrote: post #370

Earlier quoted context omitted.

I quite like the Big Sur UI and definitely don't consider it a train wreck. I've been a Mac user since the PowerBook G4, and the M1 MacBook Air with Big Sur is the best "desktop" computer I've ever owned. I have it connected to a beautiful 32" display, it's fast, silent and I find the UI very usable I see a strong vision in Big Sur, one that pulls macOS visually into line with iOS, but there are a lot of rough edges…

Visually it is a dumpster fire. Window borders are inconsistently sized, the close/minimize/full screen buttons aren’t consistently placed. There’s an enormous amount of wasted space. You need that 32” monitor. My 16” RMBP now has as much usable space as my 13”. Keyboard navigation is bizarre. Try this: 1) Open Mail. 2) Cmd W. 3) Cmd 1 (or is it Cmd 0?!, hint: it’s whatever Messages isn’t!) 4) Without using your mous…

I don't have a problem with using the smaller MacBook Air 13" screen for development (I upgraded from a 15" MBP)

I'm not a huge Mail user so I'm not up-to-speed on keyboard shortcuts. But I was able to navigate with the keyboard easily — I hit tab to focus on the correct list then use the up/down arrows to select the inbox or message (your 4/5/6). After hitting Cmd+W both Cmd+0 or Cmd+1 bring the Mail window back for me. And Cmd+Shift+D still sends mail which is the main one I use

I am a huge Xcode user and primarily use the keyboard for code navigation, and that is as good as ever on the 13" MacBook Air in Big Sur. Also use Sketch a lot, and that has been just great too

I guess we have a very different perception of Big Sur but mine is generally favourable, and I don't see the wasted space that you see. There have been a few weekends where I have done all my work on the 13" MBA, which is only just now possible due to battery life, and the experience has been really, really nice

Re: Intel Problems

#405

Post by saagarjha »

astrange wrote: post #403
saagarjha wrote: post #402

Earlier quoted context omitted.

I am currently working on a native UI to visualize spindumps :(

Well try not to get the user lost in opening and closing all those call stack outline views, I'd rather just scroll in BBEdit ;)

It’s outline views, but I’ll see if I can keep an option to scroll through text too. (Personally, a major reason why I made this was I didn’t want to scroll through text like Activity Monitor does…)

Re: Intel Problems

#406

Post by mulmen »

interpol_p wrote: post #404
mulmen wrote: post #377

Earlier quoted context omitted.

Visually it is a dumpster fire. Window borders are inconsistently sized, the close/minimize/full screen buttons aren’t consistently placed. There’s an enormous amount of wasted space. You need that 32” monitor. My 16” RMBP now has as much usable space as my 13”. Keyboard navigation is bizarre. Try this: 1) Open Mail. 2) Cmd W. 3) Cmd 1 (or is it Cmd 0?!, hint: it’s whatever Messages isn’t!) 4) Without using your mous…

I don't have a problem with using the smaller MacBook Air 13" screen for development (I upgraded from a 15" MBP) I'm not a huge Mail user so I'm not up-to-speed on keyboard shortcuts. But I was able to navigate with the keyboard easily — I hit tab to focus on the correct list then use the up/down arrows to select the inbox or message (your 4/5/6). After hitting Cmd+W both Cmd+0 or Cmd+1 bring the Mail window back for…

Yes but those shortcuts are inconsistent. Cmd 1 does not bring back Messages for example. I have to press tab several times in Mail to figure out where I am in Big Sur where in Catalina the selection is always highlighted. You can’t use the keyboard to change mailboxes in Big Sur as far as I can tell. There’s no clear “language” to the shortcuts.

You’d have more usable space with Catalina on that 13” screen. It was a noticeable loss of space upgrading from Catalina to Big Sur on a 16” RMBP. I used to have space for three partially overlayed windows on my 16” screen. Now I am lucky to get two. Usable space on a 16” Big Sur MacBook is similar to a 13” Catalina MacBook. I have both. My workflows changed. There is no benefit to me as a user.

Take a look at this visual comparison: https://www.andrewdenty.com/blog/2020/07/01/a-visual-compari...

Look at the “traffic light” buttons. Note how much thicker the top bar is in Big Sur. It’s 50% taller! That’s a lost row of text.

Re: Intel Problems

#407

Post by stefan_ »

amluto wrote: post #356
stefan_ wrote: post #72

Earlier quoted context omitted.

Why are people so hung up about the x86 thing? ARM continues to be sold on because everyone has now understood they don't really matter; they are not driving the innovations, they were simply the springboard for the Apples, Qualcomms and Amazons to drive their own processor designs, and they are not setup to profit from that. ARMs reference design isn't competitive, the M1 is. Instruction set architecture at this poi…

I would argue that ISA does matter. Beyond the decode width issue, x86 has some material warts compared to ARM64: The x86 atomic operations are fundamentally expensive. ARM’s new LSE extensions are more flexible and can be faster. I don’t know how much this matters in practice, but there are certainly workloads for which it’s a big deal. x86 cannot context-switch or handle interrupts efficiently. ARM64 can. This comp…

That baggage means I can at least boot an Intel system without first building my own device tree, then hacking the kernel to actually make it work. Meanwhile over in ARM M1 land, they apparently managed to break wfi.

Re: Intel Problems

#408

Post by samus »

azinman2 wrote: post #334
sanxiyn wrote: post #271

Earlier quoted context omitted.

I think it's just a difficult problem. Intel is trying to do 10 nm without EUV. TSMC never solved that problem because they switched to EUV at that node size.

Why do they not want to use EUV?

Wild speculations: "newness" budget for 10nm was already used up by other innovations. Or they earmarked all EUV resources for 7nm or 5nm. EUV steppers don't exactly grow on trees.

Re: Intel Problems

#409

Post by ogre_codes »

mulmen wrote: post #381
alsetmusic wrote: post #364

Earlier quoted context omitted.

> Such a drastic change seems to be an admission that they thought the previous design language was wrong but they seem to have replaced it with... no vision at all? Sure, but Jonny Ive just officially left. He was head of all design (when he should have been head of hardware design only). It’s natural that there would be greater-than-usual changes as someone new took over. Big Sur has some pretty terrible changes. T…

Yeah exactly. I understand what is going on here. I’m just frustrated I have to suffer through it for the vanity of Not-Jony-Ive.

The frustrating thing for me is the whole idea of rebooting things visually when it's not based on productivity or additional features. So much of this is just a visual reboot.

Overall though when I hear about the "iOSification" I worry foremost about locking down the OS which doesn't seem to be a big issue.

My personal computer is on Big Sur, but I've kept my work laptop on Catalina so a lot of this doesn't hit me work wise. It doesn't seem too horrible to me when working on private projects but that's a small percentage of my time.

Re: Intel Problems

#410

Post by samus »

koheripbal wrote: post #319
mc10 wrote: post #251

Earlier quoted context omitted.

> Semiconductors helps keep Taiwan from China's encroachment because it buys them protection from allies like the US and Europe, whose economies heavily rely on them. Are there any signed agreements that would enforce this? If China one day suddenly decides to take Taiwan, would the US or Europe step in with military forces?

https://en.wikipedia.org/wiki/Taiwan_Relations_Act > The Taiwan Relations Act does not guarantee the USA will intervene militarily if the PRC attacks or invades Taiwan

It would not be wise to commit to intervene in all circumstances. Similarly, also the NATO treaties do not specify in detail how the allies have to react in case of an attack.
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