41–50 of 141 posts
Earlier quoted context omitted.
What does TI do with their out-of-tolerance products? Straight in the garbage?
TI isn't patterning $10000 wafers at 3nm with massive chiplets and questionable yield, they are making mostly commodity ICs on cheaper processes - they can afford to discard rejects.
Discarded things tend to get lost. Lost things tend not stay in the Anduin forever.
Should be easy to compare - sand down both the cheapo and a legit one (with a similar datecode) with fine sandpaper, clean with isoprop and shove under an optical microscope - you can then tell how similar/dissimilar the dies are, you don't even have to look for markings or anything super legible, or even sand them to the same metal layer. Clones tend to be vastly different - different technology node, architecture,…
IMO, I have mostly seen mislabeling, rebinning, and passing off obvious QC rejects.
example from many years ago: https://www.youtube.com/watch?v=e6DfBuPwAAA
Should be easy to compare - sand down both the cheapo and a legit one (with a similar datecode) with fine sandpaper, clean with isoprop and shove under an optical microscope - you can then tell how similar/dissimilar the dies are, you don't even have to look for markings or anything super legible, or even sand them to the same metal layer. Clones tend to be vastly different - different technology node, architecture,…
I have done this a bunch of different times, mostly to resolve sourcing disputes. Dissolving in boiling sulphuric acid/nitric acid will make quick work of most epoxy packaging IMO, I have mostly seen mislabeling, rebinning, and passing off obvious QC rejects. example from many years ago: https://www.youtube.com/watch?v=e6DfBuPwAAA
That's the better method of course (results wise), but it's not nearly as accessible, hence my recent evangelism of the virtues of 2000 grit sandpaper.
Earlier quoted context omitted.
Honestly: no one of the bigger players in the industry pays the prices you see on Digikey/Mouser/Farnell (with the exception maybe for prototyping stuff). Often you have direct delivery contracts with the vendors. That the ADS1115 costs I have access to our internal STM32 pricing. You'd be shocked.
H7s for <$1? I get confused whenever people talk about paying $0.69 for an MCU!
I'd like to know more about the world of ADCs. I've used the ADS1115 with success but only at very slow speeds. On the current project we started with an MCP3208 via SPI. It did the job but only has 8 channels and it's slow (100K samples per sec). To get something faster we switched to ADS7953. It has 16 channels and runs 10 times faster. It's somewhat more complex to code, and you can only get the highest sample rat…
What about the AD9226? It only has a single channel but can do up to 65 MSa/s at 12 bits. I bought one as a module for around $12 on AliExpress to experiment with software decoding of analog video. I only run it at 20 MSa/s and only use 8 bits because, funnily enough, the limiting factor is the speed at which I could get the data into my laptop. I connected it to a Raspberry Pi Zero and use the SMI peripheral as described here: https://iosoft.blog/2020/07/16/raspberry-pi-smi/
Err, the title isn't really correct. The genuine part is still only $4. This is a 60 cent knockoff. Not having done design in a while but still having a rough feeling for costs I was a bit confused.
Honestly: no one of the bigger players in the industry pays the prices you see on Digikey/Mouser/Farnell (with the exception maybe for prototyping stuff). Often you have direct delivery contracts with the vendors. That the ADS1115 costs I have access to our internal STM32 pricing. You'd be shocked.
One supplier I developed a relationship with showed us their internal numbers and it was $1,000-3,000 per wafer for 130nm-180nm nodes with a minimum order of 25 wafers. Once the part is designed and the mask is made, the cost is mostly just the setup plus whatever they want for the IP. The silicon itself is often cheaper than the packaging around it.
Single cycle readings defeat the point of sigma delta ADC setups.
You're taking many high noise samples and averaging them over time to get a better picture of the average voltage.
Earlier quoted context omitted.
TI isn't patterning $10000 wafers at 3nm with massive chiplets and questionable yield, they are making mostly commodity ICs on cheaper processes - they can afford to discard rejects.
I think the implied question is do they discard, or do they destroy. Discarded things tend to get lost. Lost things tend not stay in the Anduin forever.
I'll have to put that on a warning label near our non-conforming-product containment shelf!