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Intel announces new FPGA families

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Re: Intel announces new FPGA families

#41

Post by jstrom »

tgv wrote: post #33
muttled wrote: post #31

I see a lot of use of FPGAs in things like cutting-edge machinery, warfare, and stock trading. Are there any cool hobbyist uses of these things? Always game to learn a new tech.

There's always sound or image generation, or programming a game like Pong. That's always looked cool to me. There are some "easy" entry points, e.g. https://maker.pro/arduino/tutorial/getting-started-with-fpga... , but I've never gone as far as actually try them. With a bit of luck, someone will reply with better options. Edit: or look at this list: https://hackaday.io/search?term=fpga

The Cypress PSoC might be of interest. It's a combination FPGA and microcontroller, the low-end demo boards with USB programming get as low as ~$10.

Though most of what you can do with the FPGA would be covered by built-in timer/capture modules or the PICO PIO modules on other chips (though IIRC, some of the boards have analog support in the FPGA if you wanted to do real-time audio processing). I have not found a particular hobbyist use for them, only know it from my father teaching some computer engineering courses and picking since he could use the same board for digital logic and microcontroller programming.

Re: Intel announces new FPGA families

#42

Post by xani_ »

AnonMO wrote: post #32
snvzz wrote: post #28

That's some news because Intel hadn't in a while. But IMHO this is is far more interesting: https://hardwarebee.com/gowin-semiconductor-new-22nm-high-pe... This is a real contender from China. Not just some new cheap chip, but actually competitive with Intel/Lattice/Xilinx offerings.

Competitive in what sense? in which market outside of china? Cyclone V a decade old platform offers similar capability and is a tested platform.

You can buy their parts on mouser and they have "small" fpgas too

there are even few in stock https://eu.mouser.com/ProductDetail/GOWIN-Semiconductor/GW1N...

Re: Intel announces new FPGA families

#43

Post by chclau »

muttled wrote: post #31

I see a lot of use of FPGAs in things like cutting-edge machinery, warfare, and stock trading. Are there any cool hobbyist uses of these things? Always game to learn a new tech.

For me, one option is to be able to learn processors in depth. You want to understand how one works? You can always emulate it in SW, but on an FPGA you can make them interact with the real world in real time and probe them at the same time, with ready made signal analyzers that the vendors provide, and/or by making your own tools.

Another option, do you want to see by yourself how caching improves code performance? You can make that on an FPGA also.

I have done some time ago a very nice course which is called From Nand to Tetris, that teaches how to go all the way from gates to a processor. My plan for the near future is to implement the NAND2Tetris processor on a Basys 3 board, and make some of the examples I mentioned (like, probing internal registers using HW tools, or seeing by yourself how a cache improves performance). I hope to make some of these things available on my site. I am the OP, but just in case, my website is https://fpgaer.tech

Re: Intel announces new FPGA families

#44

Post by AnonMO »

snvzz wrote: post #37
AnonMO wrote: post #32

Earlier quoted context omitted.

Competitive in what sense? in which market outside of china? Cyclone V a decade old platform offers similar capability and is a tested platform.

... at 22nm? Apples to oranges.

Cyclone V is 28nm so it should be outclassed by a new product offering in 2022 thats manufactured at a better node right? i'm not saying its a bad design, but that product is not a competitive offering. this new family from intel is on intel 7 node which is at scale intel can eat node prices to stay competitive. intel will probably price this competitively with its cyclone v offering if that happens intel will eat the market share of xilinx and lattice unless they announce something new.

Re: Intel announces new FPGA families

#45

Post by FullyFunctional »

chclau wrote: post #2

Following Altera acquisition by Intel, and Xilinx acquisition by AMD, perspectives for many FPGA designers were gloom. There was a general feeling that the two biggies would go to a road where the FPGA is only and add-on or coprocessor for CPU workhorses, for applications like Data centers and ML acceleration. Well, according to these news from Intel, that's not the case. Intle announces new mid-level FPGAs and even…

I share(d) that concern. Mitigating this is that a lot of (low to mid range) alternatives seems to have gotten steam: Lattice Semi, Efinix, Gowin, and more that I forget at the moment. I'm rooting strongly for the underdogs to become viable alternatives to the current duopoly.

It would of course have been preferable for any of them to directly support the open stack (yosys, nextpnr, and the various bitstream generators); Lattice's ECP5 is nice, but not very fast.

Re: Intel announces new FPGA families

#46

Post by jjoonathan »

brooksbp wrote: post #35
amirhirsch wrote: post #26

The Intel Direct RF FPGAs are pretty spectacular. They report 64GSPS and 25GHz instantaneous bandwidth directly into FPGA fabric (no JESD) which greatly exceeds any other competitors’ IC offerings on the market. I wonder what they will cost: if their high-end 8ch device is <$16K then they will annihilate the competition (I’m able to get $2K per channel for large multichannel direct RF systems 1Ghz instantaneous all t…

I can only imagine how long it will take the fitter to pnr these insanely wide busses. Maybe a 13th gen CPU overclocked to 8GHz would be handy.

Xilinx keeps advertising the bejeesus out of their AI p&r, but I haven't touched these tools in years -- how much do the claims translate to reality?

Re: Intel announces new FPGA families

#47

Post by FullyFunctional »

aseipp wrote: post #16
foft wrote: post #7

Earlier quoted context omitted.

I'll try to answer this, though my direct experience is only with Cyclone and Max 10. The Mister uses the Cyclone V 5CSEBA6U23I7 built on TSMC 28nm. It has 110000 logic elements and also a hard ARM. These are on Intel 7, so there a significant process improvement. The smallest Agilex D has the same number of logic elements(1) and the largest has 6x as many (2). Note that Agilex tends to be much more expensive than Cy…

You can in theory clock the Agilex/S10 parts up-to 1GHz, but something like 600-700MHz sounds more realistic, yes. (Note that this is in the same ballpark as what Virtex UltraScale+ can do too.) Also, regarding point 1 -- and I'm sure you know this already, but this is for everyone else -- you have to be careful when talking about "Logic Elements" with most of the industry because, even when describing 6-LUT parts, I…

100%. For the record, the metrics I care about, and the first I seek out, is blockram cycle time and total device memory capacity. Unfortunately, unlike say Xilix/AMD, Intel doesn't publish that number directly, but Xilix/AMD's fastest for is > 800 MHz for the lovely Artix US+ and it has loads of memory.

The LUT count is a murky beast beast as you realistically cannot use them all lest P&R times shall be counted in weeks.

Re: Intel announces new FPGA families

#49

Post by rowanG077 »

jjoonathan wrote: post #46
brooksbp wrote: post #35

Earlier quoted context omitted.

I can only imagine how long it will take the fitter to pnr these insanely wide busses. Maybe a 13th gen CPU overclocked to 8GHz would be handy.

Xilinx keeps advertising the bejeesus out of their AI p&r, but I haven't touched these tools in years -- how much do the claims translate to reality?

Considering my experience with Xilinx, the more they advertise it the harder it sucks.
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