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Sally McKee, who coined the term "the memory wall", has died

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Re: Sally McKee, who coined the term "the memory wall", has died

#31

Post by tomjakubowski »

thaumasiotes wrote: post #27
deater wrote: post #4

Earlier quoted context omitted.

you wouldn't believe how many people cite that paper as "Wulf et al." when that's practically more characters than saying "Wulf and McKee" I notice these things a bit more as she was my PhD thesis advisor

> you wouldn't believe how many people cite that paper as "Wulf et al." when that's practically more characters than saying "Wulf and McKee" Wulf et al. Wulf and McKee 35% less isn't usually described as "practically more". It'd be interesting to see someone use the unabbreviated form; I have a hunch they wouldn't know to say "et alia".

How did you arrive at 35% less? The first is 11 characters, the second is 14, and 3/14 is 21%.

Re: Sally McKee, who coined the term "the memory wall", has died

#32

Post by [deleted] »

b473a wrote: post #8
DespairYeMighty wrote: post #3

She was a CS PhD and somewhat itinerant professor with a long career who wrote a prominent CS paper about computer memory, Hitting the Memory Wall: Implications of the Obvious https://dl.acm.org/doi/10.1145/216585.216588 on her obituary page, you will see a prominent "Memory Wall" link that is NOT a reference to her paper, but a place for sharing your thoughts about her life

Yeah tenure is nice but there's just a hint of mystery behind the title "itinerant professor." Like a wizard that just pops up in places to work computer science magic.

[deleted]

Re: Sally McKee, who coined the term "the memory wall", has died

#33

Post by vlovich123 »

Veserv wrote: post #17
AnimalMuppet wrote: post #7

Earlier quoted context omitted.

Could you (or someone else in the know) give us a brief overview of the current state of the memory wall issue?

High bandwidth memory (HBM) can deliver TB/s of memory bandwidth and has completely shattered the memory wall for individual cores/compute elements. The only way for compute to keep up is going wide and parallel as seen in GPUs. Despite this, massively increased memory bandwidth does not translate to material performance improvements on non-parallel compute tasks because few tasks are actually memory bandwidth bound,…

Well…. The reason there’s such a big mismatch is the memory controller. Something like 80-90% of the energy is spent moving data in and out because of the complex addressing. If you move compute into the RAM and instead shuttle instructions in and out, you might get a huge speed up. The challenge is when an instruction references some data over there - that may end up eliminating all the advantage. But people I believe are trying to commercialize this concept.

Re: Sally McKee, who coined the term "the memory wall", has died

#34

Post by thaumasiotes »

tomjakubowski wrote: post #31
thaumasiotes wrote: post #27

Earlier quoted context omitted.

> you wouldn't believe how many people cite that paper as "Wulf et al." when that's practically more characters than saying "Wulf and McKee" Wulf et al. Wulf and McKee 35% less isn't usually described as "practically more". It'd be interesting to see someone use the unabbreviated form; I have a hunch they wouldn't know to say "et alia".

How did you arrive at 35% less? The first is 11 characters, the second is 14, and 3/14 is 21%.

That is a good question. As you say, it's 21%. I had the 11 and the 14 correct; I don't remember how I got 35%.

Re: Sally McKee, who coined the term "the memory wall", has died

#35

Post by zozbot234 »

vlovich123 wrote: post #33
Veserv wrote: post #17

Earlier quoted context omitted.

High bandwidth memory (HBM) can deliver TB/s of memory bandwidth and has completely shattered the memory wall for individual cores/compute elements. The only way for compute to keep up is going wide and parallel as seen in GPUs. Despite this, massively increased memory bandwidth does not translate to material performance improvements on non-parallel compute tasks because few tasks are actually memory bandwidth bound,…

Well…. The reason there’s such a big mismatch is the memory controller. Something like 80-90% of the energy is spent moving data in and out because of the complex addressing. If you move compute into the RAM and instead shuttle instructions in and out, you might get a huge speed up. The challenge is when an instruction references some data over there - that may end up eliminating all the advantage. But people I belie…

> If you move compute into the RAM and instead shuttle instructions in and out, you might get a huge speed up.

Isn't that just a per-compute cache/local memory? You're proposing a scaled-up variety of NUMA where every compute core has its local memory and going outside that will cost you more.

Re: Sally McKee, who coined the term "the memory wall", has died

#36

Post by bjourne »

remexre wrote: post #29
bjourne wrote: post #23

Earlier quoted context omitted.

What "informal credit assignment"? It's automated and it runs entirely on quantitative data.

the one where i think of a particular piece of work, and i know who did it, then tell a student "oh, see if $author's group published anything else about this." i'm not using software for this if this is off the top of my head, and it's the sort of thing that, at scale, hurts the forgotten author and their students

I see. The informal credit assignment process is something that only runs inside of your head.

Re: Sally McKee, who coined the term "the memory wall", has died

#37

Post by ohnei »

bjourne wrote: post #36
remexre wrote: post #29

Earlier quoted context omitted.

the one where i think of a particular piece of work, and i know who did it, then tell a student "oh, see if $author's group published anything else about this." i'm not using software for this if this is off the top of my head, and it's the sort of thing that, at scale, hurts the forgotten author and their students

I see. The informal credit assignment process is something that only runs inside of your head.

Right, academics who deligate their entire intellectual life to GPT will be unaffected.

Re: Sally McKee, who coined the term "the memory wall", has died

#38

Post by bjourne »

ohnei wrote: post #37
bjourne wrote: post #36

Earlier quoted context omitted.

I see. The informal credit assignment process is something that only runs inside of your head.

Right, academics who deligate their entire intellectual life to GPT will be unaffected.

Right, and everyone else unaware of this made up "informal credit assignment process".

Re: Sally McKee, who coined the term "the memory wall", has died

#39

Post by halJordan »

mattkrause wrote: post #21
bjourne wrote: post #12

Earlier quoted context omitted.

Why? For all the automatic academic score tracking systems it doesn't matter one bit if it is Wulf et al. or Wulf and McKee.

The automated ones don't care, but it absolutely matters for the informal credit assignment process that actually runs academia. I really wish we had a better way to "name" papers. Big clinical trials often have an acronym (often hilariously forced: "CXCessoR4"). That takes the emphasis off (one) lead author but it's implausibly hard to make up one for every research paper.

So we're talking about this woman's contribution. And you're talking about how the system is depriving her of recognition.

Do you see the inherent tension in what you're claiming vs the lived experience of everyone in this post (including you!)?

Re: Sally McKee, who coined the term "the memory wall", has died

#40

Post by vlovich123 »

zozbot234 wrote: post #35
vlovich123 wrote: post #33

Earlier quoted context omitted.

Well…. The reason there’s such a big mismatch is the memory controller. Something like 80-90% of the energy is spent moving data in and out because of the complex addressing. If you move compute into the RAM and instead shuttle instructions in and out, you might get a huge speed up. The challenge is when an instruction references some data over there - that may end up eliminating all the advantage. But people I belie…

> If you move compute into the RAM and instead shuttle instructions in and out, you might get a huge speed up. Isn't that just a per-compute cache/local memory? You're proposing a scaled-up variety of NUMA where every compute core has its local memory and going outside that will cost you more.

Correct, you can think of this like NUMA or a distributed system where you have compute colocated with storage. It’s a special purpose accelerator for very specific problems that have been optimized to take advantage of such an architecture.

It’s also not my proposal. The industry is exploring ways to cut down the energy requirements to do AI - 80-90% of the memory consumption is just moving memory back and forth across the memory controller. It has to read a row from a bank into a row buffer, access the specific cell being requested and then shuttle it over the bus to the compute and then write the data back to the cells. The current idea is to maybe do the processing on the entire row buffer but you could imagine scaling that up to do it at the bank level. The challenge is manufacturing complexity since DRAM is made different, heat from the ALU, etc.

[1] https://semiconductor.samsung.com/news-events/tech-blog/hbm-...

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