This is good work. I wish branch predictor were better reverse engineered so CPU simulation could be improved. It would be much better to be able to accurately predict how software will work on other processors in software simulation rather than having to go out and buy hardware to test on (which is the way we still have to do things in 2026)
How many branches can your CPU predict?
31–40 of 66 posts
Re: How many branches can your CPU predict?
#32The testing function seems a little simple since branch density is a factor. I still love this reference:
https://blog.cloudflare.com/branch-predictor/
Should be titled: How I Learned to Stop Worrying and Love the Branch Predictor
Re: How many branches can your CPU predict?
#33I was self-taught in high school on computer architecture by reading book. I didn't own a computer, understand, but these book served the same purpose in terms of learning CPU architectures and machine language programming. The 6502 was the CPU I studied.
In 1985 as an EE student, I took a course in modern CPU architectures. I still recall having my mind blown when learning about branch prediction and speculative execution. It was a humbling moment - as was pretty much all of my studies as CMU.
Re: How many branches can your CPU predict?
#34By the no-free-lunch theorem, and the fact this 30k random branch pattern is so atypical in the real world, it would imply the loser here (Intel) is more likely to be the best branch predictor in actual benchmarks.
At least that's my prediction.
Re: How many branches can your CPU predict?
#35Intel is currently looking into replacing their branch prediction with a system based on astrology, tarot cards and crystal balls.
Re: How many branches can your CPU predict?
#36Intel is currently looking into replacing their branch prediction with a system based on astrology, tarot cards and crystal balls.
What, not an ML model?
Re: How many branches can your CPU predict?
#37Intel is currently looking into replacing their branch prediction with a system based on astrology, tarot cards and crystal balls.
What, not an ML model?
AMD has previously used neural net predictors.
Re: How many branches can your CPU predict?
#38Branch prediction works really well on loops. The looping condition is mostly true except for the very last time. The loop body is always predicted to run. If you structure the loop body to have no data dependence between iterations, multiple iterations of the loop can run in parallel. Greatly improve the performance.
Re: How many branches can your CPU predict?
#39Hmm, that's interesting. The code as written only has one branch, the if statement (well, two, the while loop exit clause as well). My mental model of the branch predictor was that for each branch, the CPU maintained some internal state like "probably taken/not taken" or "indeterminate", and it "learned" by executing the branch many times. But that's clearly not right, because apparently the specific data it's branch…
Your mental model is close. Predictors generally work by having some sort of table of predictions and indexing into that table (usually using some sort of hashing) to obtain the predictions. The simplest thing to do is use the address of the branch instruction as the index into the table. That way, each branch instruction maps onto a (not necessarily unique) entry in the table. Those entries will usually be a two-bit…
It seems like that would struggle with detecting how many layers of branching to pay attention to. Imagine the two nested loops surrounded by a randomized one. Wouldn't that implementation keep hitting patterns it hadn't seen before?
Obviously that must be a solved problem; I'd be curious to know what the solution is.
Re: How many branches can your CPU predict?
#40By the no-free-lunch theorem, and the fact this 30k random branch pattern is so atypical in the real world, it would imply the loser here (Intel) is more likely to be the best branch predictor in actual benchmarks. At least that's my prediction.
The atypical benchmark here is a manufactured worst case scenario for the purpose of quantifying the hardware capabilities. A deeper predictor means accommodating more complex program branching patterns. Obviously you'd expect to see diminishing returns versus silicone area at some point but I see no reason to assume that AMD would have made a poor allocation decision here.