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Write up of my homebrew CPU build

willwarren.com

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Re: Write up of my homebrew CPU build

#31

Post by 0xffff2 »

artemonster wrote: post #2

I always applaud homebrew cpu designs but after doing so many myself I would reaaaaly advice to stay away from dip chips/breadboards/wirewraps and any attempts to put it into real physical world. Taking a build out of a logisim/verilog to real world in chips sucks away all the fun about cpu design - suddenly you have to deal with invisible issues like timing, glitchy half-dead chip, bad wire connection, etc. these ar…

Couldn't disagree more. To the extent building a homebrew CPU is interesting at all, for me it's _only_ making it actually work despite all of the real world hiccups that make it interesting. Designing it in the simulator is "easy".

Re: Write up of my homebrew CPU build

#32

Post by __tidu »

artemonster wrote: post #2

I always applaud homebrew cpu designs but after doing so many myself I would reaaaaly advice to stay away from dip chips/breadboards/wirewraps and any attempts to put it into real physical world. Taking a build out of a logisim/verilog to real world in chips sucks away all the fun about cpu design - suddenly you have to deal with invisible issues like timing, glitchy half-dead chip, bad wire connection, etc. these ar…

id take it further to say dont even design your own ISA because its super rewarding watching your custom designed CPU run real software from an actual compiler (all you need is rv32i minus the CSRs)

Re: Write up of my homebrew CPU build

#34

Post by thenthenthen »

fc417fc802 wrote: post #27
numpad0 wrote: post #25

Earlier quoted context omitted.

IIUC, that's what sci-fi LED panels of really old computers were. They showed all the internal statuses of the CPU as well as CPU-RAM bus. And the toggle switches allowed individual bit overrides. The operator sets a CPU RESET switch to RESET, then powers on the machine, and start toggling RAM address and data switches, like HHLL HLLH HHHL LLLL. The operator then press and release the STEP push switch. The address 0b…

The pictures of workers weaving a program into core rope memory is peak steampunk vibes.

Weaving and computing are closely intertwined

Re: Write up of my homebrew CPU build

#35

Post by cdcarter »

monocasa wrote: post #29
moring wrote: post #8

Earlier quoted context omitted.

Actual application code was hardwired, entered manually with switches and lights, or with punch cards. Later, when ICs were sufficiently advanced, mask-programmed ROMs/PLAs.

Or diode matrix ROMs were pretty popular as well. Electrically, essentially what happens in most mask ROMs, but as a circuit board that allowed you to solder in a diode or not in each bit location in order to specify a 1 or a 0.

That would be the "hardwired" option.

Re: Write up of my homebrew CPU build

#37

Post by wwarren »

P-Nuts wrote: post #10

To get both blinkenlights for registers and tri-state for bus driving, use two ’574 chips in parallel rather than a ’377 behind a ’245. Tie the clock and input lines together on both. Tie the output enable low on the one driving the blinkenlights. This way the chip that the rest of the CPU depends on doesn’t have the extra work of driving any load and you only have one chip’s worth of propagation delays.

Amazing tip! Will do

Re: Write up of my homebrew CPU build

#39

Post by wwarren »

Mercuriusdream wrote: post #14

Also tried to homebrew CPUs before but couldn't even start due to a wall of things to prepare; Seeing this is just amazing to be honest. Wish you a luck on your project!

You can do so much before needing to buy anything or even learn any electronics. There’s a lot of good simulation options out there like Digital, Logisim-Evolution, even video games like Turing Complete and Logic World! That’s before you even get into stuff like Verilog. Thanks for the kind words!

Re: Write up of my homebrew CPU build

#40

Post by wwarren »

code_biologist wrote: post #4
artemonster wrote: post #2

I always applaud homebrew cpu designs but after doing so many myself I would reaaaaly advice to stay away from dip chips/breadboards/wirewraps and any attempts to put it into real physical world. Taking a build out of a logisim/verilog to real world in chips sucks away all the fun about cpu design - suddenly you have to deal with invisible issues like timing, glitchy half-dead chip, bad wire connection, etc. these ar…

I'm totally with you personally, but sometimes doing the actually hard part is fun. Type 2 fun. Long ago I took a CPU architecture class and we implemented designs in Verilog as a final project. Apparently people who took the class in the late 90s (before my time) could actually tape-out their designs and pay a few hundred dollars to get fabbed chips as part of a multiproject wafer. I was always curious if those chip…

Type 2 fun, totally stealing that!
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