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I don't know how CPUs work so I simulated one in code (2019)

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Re: I don't know how CPUs work so I simulated one in code (2019)

#31

Post by sweetjuly »

pyinstallwoes wrote: post #27
cogman10 wrote: post #4

So, what this project misses, which is quite hard to capture if you think of gates being just on off switches, is the fact that signals are not instantaneous, and everything runs in parallel. As the AND gate 4 gates up the chain switches the NOT gate 4 gates down the chain starts to send different and unstable signals which may or may not be interpreted as a 1 or 0 in the downstream gate. That's the reason computers…

But there exists clockless architectures.

Is clockless useful in the face of modern ASIC tools? Not that you were suggesting in either direction, but it's been something in the back of my head for a while now.

Sure, there's a slight power and latency advantage in avoiding flip flops themselves but every tool has slack stealing and so the core advantage everyone seems to claim clockless (that is, the ability to have different latencies for all your different pipelines) isn't that unique anymore and hasn't been for a long time. Is it dead, can I stop worrying about the async demons :)

Re: I don't know how CPUs work so I simulated one in code (2019)

#32

Post by flohofwoe »

cogman10 wrote: post #4

So, what this project misses, which is quite hard to capture if you think of gates being just on off switches, is the fact that signals are not instantaneous, and everything runs in parallel. As the AND gate 4 gates up the chain switches the NOT gate 4 gates down the chain starts to send different and unstable signals which may or may not be interpreted as a 1 or 0 in the downstream gate. That's the reason computers…

The netlist simulation of visual6502.org [1] works like this, it basically runs the simulation in a loop until the node network reaches a steady state, which means the current clock cycle is 'done'. This is a C port of that inner loop [2].

[1] http://visual6502.org/JSSim/index.html

[2] https://github.com/mist64/perfect6502/blob/268d16647c6b9cb0c...

Re: I don't know how CPUs work so I simulated one in code (2019)

#33

Post by dailykoder »

cogman10 wrote: post #4

So, what this project misses, which is quite hard to capture if you think of gates being just on off switches, is the fact that signals are not instantaneous, and everything runs in parallel. As the AND gate 4 gates up the chain switches the NOT gate 4 gates down the chain starts to send different and unstable signals which may or may not be interpreted as a 1 or 0 in the downstream gate. That's the reason computers…

>This is why it's probably a good idea to work with a HDL instead of just trying to wing it.

During my CE studies I got hooked heavily on FPGAs and HDLs, but the amount of times I actually ran into a timing problem, which only occured on hardware, because of these delays, can be counted on one hand. Playing around with this crap since about 2018. The worst one was where I got clock domain crossing wrong while trying to get DDR3 RAM working for my master thesis. It worked flawless in simulation. Took me weeks to find the wrong status signal

Yes, they can be a serious problem. Yes, you should know about it. But no, it's not necessary

Re: I don't know how CPUs work so I simulated one in code (2019)

#34

Post by immibis »

Arnavion wrote: post #8
cogman10 wrote: post #4

So, what this project misses, which is quite hard to capture if you think of gates being just on off switches, is the fact that signals are not instantaneous, and everything runs in parallel. As the AND gate 4 gates up the chain switches the NOT gate 4 gates down the chain starts to send different and unstable signals which may or may not be interpreted as a 1 or 0 in the downstream gate. That's the reason computers…

The game Silicon Zeroes ( https://store.steampowered.com/app/684270/Silicon_Zeroes/ ) teaches this. It starts out with components computing their outputs instantaneously, but then introduces the concept of microticks such that the output of a component is unstable until its inputs are stable enough for some time, so the clock speed must be adjusted according to the largest delay in all circuit paths. The game starts…

I found that Silicon Zeroes is a pretty crappy emulation of a Zachtronics game. IIRC each level has an intended solution and only gives you the exact parts to create that solution, even if a better solution would be possible with different parts you've used before.

Re: I don't know how CPUs work so I simulated one in code (2019)

#35

Post by jonathanlydall »

e63f67dd-065b wrote: post #14
cogman10 wrote: post #4

So, what this project misses, which is quite hard to capture if you think of gates being just on off switches, is the fact that signals are not instantaneous, and everything runs in parallel. As the AND gate 4 gates up the chain switches the NOT gate 4 gates down the chain starts to send different and unstable signals which may or may not be interpreted as a 1 or 0 in the downstream gate. That's the reason computers…

The thing that got me into CS was building a CPU in Minecraft redstone, which is surprisingly good at being a logic simulator. You only got (back in my day) NOT (the torch) and OR gates (wiring next to each other), and everything was built out of them. Signal repeaters had delay, the gates had delay, so you naturally had to build a clock to synchronise it all. The main benefit that I enjoyed was that you could see th…

Shameless plug, I made this website which simulates Minecraft redstone as a hobby project many years ago:

https://mordritch.com/mc_rss/

Make sure to press the "Play" button at the top for the simulator to actually run.

Re: I don't know how CPUs work so I simulated one in code (2019)

#36

Post by xnorswap »

immibis wrote: post #34
Arnavion wrote: post #8

Earlier quoted context omitted.

The game Silicon Zeroes ( https://store.steampowered.com/app/684270/Silicon_Zeroes/ ) teaches this. It starts out with components computing their outputs instantaneously, but then introduces the concept of microticks such that the output of a component is unstable until its inputs are stable enough for some time, so the clock speed must be adjusted according to the largest delay in all circuit paths. The game starts…

I found that Silicon Zeroes is a pretty crappy emulation of a Zachtronics game. IIRC each level has an intended solution and only gives you the exact parts to create that solution, even if a better solution would be possible with different parts you've used before.

While you're right that Silicon Zeroes is not the best as a zach-like puzzle game, I actually found it did a better job of teaching me about building a computer than most similar games.

However, I played it years before Turing Complete was released, and I'd probably recommend that over SZ. But SZ does a better job at introducing some of the timing concepts.

Re: I don't know how CPUs work so I simulated one in code (2019)

#37

Post by imtringued »

cogman10 wrote: post #21
metaphor wrote: post #18

Earlier quoted context omitted.

> That's the reason computers have a clock, to make sure all transistors in a given stage of a CPU reach a steady state before moving on to the next instruction. Here I was thinking[1][2] the reason computers had clocks was merely a consequence of the synchronous architectures that characterize them. [1] https://en.wikipedia.org/wiki/Metastability_(electronics) [2] https://en.wikipedia.org/wiki/Quasi-delay-insensitiv…

What point are you trying to make? You are correct that clock free designs exist. But calling it a mere consequence of sync design seems to be a misunderstanding of why sync design has a clock in the first place.

The purpose of synchronous designs is to minimize the overhead of the handshaking that asynchronous designs bring with them. There is no other meaningful difference between them, really.

Re: I don't know how CPUs work so I simulated one in code (2019)

#38

Post by e63f67dd-065b »

jonathanlydall wrote: post #35
e63f67dd-065b wrote: post #14

Earlier quoted context omitted.

The thing that got me into CS was building a CPU in Minecraft redstone, which is surprisingly good at being a logic simulator. You only got (back in my day) NOT (the torch) and OR gates (wiring next to each other), and everything was built out of them. Signal repeaters had delay, the gates had delay, so you naturally had to build a clock to synchronise it all. The main benefit that I enjoyed was that you could see th…

Shameless plug, I made this website which simulates Minecraft redstone as a hobby project many years ago: https://mordritch.com/mc_rss/ Make sure to press the "Play" button at the top for the simulator to actually run.

The state of the art these days is https://github.com/MCHPR/MCHPRS

It's an implementation of the minecraft server that compiles redstone into a graph representation, and then does optimisations like constant folding, tree shaking, etc. Very cool project. If you ever see timelapses of minecraft computers running game of life, mandelbrot, etc it's most likely with this project.

Re: I don't know how CPUs work so I simulated one in code (2019)

#39

Post by globular-toast »

cogman10 wrote: post #4

So, what this project misses, which is quite hard to capture if you think of gates being just on off switches, is the fact that signals are not instantaneous, and everything runs in parallel. As the AND gate 4 gates up the chain switches the NOT gate 4 gates down the chain starts to send different and unstable signals which may or may not be interpreted as a 1 or 0 in the downstream gate. That's the reason computers…

Or you can build a computer on a breadboard: https://www.youtube.com/playlist?list=PLowKtXNTBypGqImE405J2...

I did this and not only was it great fun it taught me loads about clocks and busses etc. that was all magic before.

Re: I don't know how CPUs work so I simulated one in code (2019)

#40

Post by stonethrowaway »

SoftTalker wrote: post #23
henrikschroder wrote: post #16

One of the most enlightening courses I took in university back in the day was digital electronics. Not because I ever wanted to muck about with it, but because we actually got to build our own super-simple physical 8-bit CPU. We had registers and an ALU and RAM and eight output leds, and we got to write the microcode for the fetch-execute cycle. Clock? There was a physical switch you would toggle on and off to make i…

Old minicomputers had toggle switches on the front panel where you could set the program counter, enter machine code instructions, and other things, as well as step the clock. https://thumbs.worthpoint.com/zoom/images2/1/0619/05/vintage...

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