Earlier quoted context omitted.
Yep, when you get down to the raw materials used for these devices you get to three/four companies the supply chain relies on
What are the materials/companies?
ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
31–40 of 69 posts
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#32Earlier quoted context omitted.
>> ASML is going to remain a monopoly and whatever Chinese alternative that there may be is going to stay in China. Suppose China develops a cheaper way to produce the EUV light and sells the tools for half what ASML does. They might sell to others just to become the leader.
They might want to sell... but who might (want to) buy, outside of Russia and maybe India? The Western world is already decoupling from China and I think it's completely infeasible that anyone wants to create new ties to China.
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#33Earlier quoted context omitted.
Yep, when you get down to the raw materials used for these devices you get to three/four companies the supply chain relies on
What are the materials/companies?
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#34Earlier quoted context omitted.
What's nuts to me is the time scale on the bottom. That is not a lot of time for something so complex. Then again, if they do an Intel 10nm+++++ and fail to maintain velocity even for a couple of years, their competition will close that gap very quickly.
Who are their real competitors? They’ve been buying parts of the supply chain recently - they seem to have a real moat unless regulation gets involved (Serious question: I am just getting into the semiconductor world and haven’t found any competitors yet)
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#35Earlier quoted context omitted.
> I’m not sure Intel and Samsung are behind TSMC Intel is trying to catch up but Samsung just has no idea. Samsung spent years poaching, merging and sniffing trade secrets to survive. Problem with Intel is that most of it is Intel specific (still)
Also, Samsung's fab is genuinely behind. Exynos and Samsung-built tensor chips are consistently hotter and more power-hungry than Snapdragons. It's pretty sad for us in Europe because we pay the same for our phones but get a worse product. We also miss out on features like 5G mmWave and MST (though I believe that's now gone from the US too)
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#36Earlier quoted context omitted.
> I’m not sure Intel and Samsung are behind TSMC Intel is trying to catch up but Samsung just has no idea. Samsung spent years poaching, merging and sniffing trade secrets to survive. Problem with Intel is that most of it is Intel specific (still)
Also, Samsung's fab is genuinely behind. Exynos and Samsung-built tensor chips are consistently hotter and more power-hungry than Snapdragons. It's pretty sad for us in Europe because we pay the same for our phones but get a worse product. We also miss out on features like 5G mmWave and MST (though I believe that's now gone from the US too)
I had a exynoss s22 and my experience was miserable, in and out the repair center.
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#37Earlier quoted context omitted.
What are the materials/companies?
The lithography/EUV optics comes from Zeiss. The laser for generating the plasma from Trumpf. Both key elements that ASML would not be able to build in-house or get from a different supplier.
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#38Earlier quoted context omitted.
Also, Samsung's fab is genuinely behind. Exynos and Samsung-built tensor chips are consistently hotter and more power-hungry than Snapdragons. It's pretty sad for us in Europe because we pay the same for our phones but get a worse product. We also miss out on features like 5G mmWave and MST (though I believe that's now gone from the US too)
Thank got at least the new Ultras have only snapdragon I had a exynoss s22 and my experience was miserable, in and out the repair center.
Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#39Re: ASML Aims for Hyper-NA EUV, Shrinking Chip Limits
#40Can some experts/knowledgeable folks here actually explain the technology in ELI5 (and above) terms? As i understand, a laser (what are its characteristics?) is fired at Tin droplets in a vaccuum chamber causing it to emit light in "Extreme UV" wavelength range which is then focused using a set of Zeiss mirrors to do the actual photolithography. Wikipedia (https://en.wikipedia.org/wiki/Extreme_ultraviolet_lithograph...) is well over my head. What i am unable to bridge is how this EUV wavelength maps to transistor sizes (in nanometers) via High-NA/Hyper-NA technology.
From https://www.laserfocusworld.com/blogs/article/14039015/how-d...
A major limitation comes from the laws of optics. German physicist Ernst Abbe found that the resolution of a microscope d is (roughly) limited to the wavelength λ of the light used in illumination:
d = λ/(nsin(α)) ...(1)
where n is the refractive index of the medium between the lens and the object and α is the half-angle of the objective's cone of light. For lithography, substituting numerical aperture (NA) for n sin(α) and adding a factor k to the formula (because lithographic resolution can be strongly tweaked with illumination tricks), the minimum feasible structure, or critical dimension (CD), is:
CD = kλ/NA ...(2)
This formula, which governs all lithographic imaging processes, makes obvious why the wavelength is such a crucial parameter. As a result, engineers have been looking for light sources with ever-shorter wavelengths to produce ever-smaller features.
Explain the above?