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Can somebody explain why a square root is also considered a flop? Surely that involves more work than the other four operations the article listed. Is there some hardware algorithm for the square root that is as fast as (e.g.) division?
Earlier quoted context omitted.
As a computer-engineer, the circuit design needed to make a fast multiplication operation (ie: Wallace Tree, and similar) are an order-of-magnitude larger than the circuit design needed for fast addition (ie: a Kogge-Stone Carry lookahead Adder). This idea that additions and multiplications can be combined like this as "equivalent operations" is kinda bullshit. But hey, if its "how its done" (and its done this way be…
It was just an example, not necessarily a realistic one. The point is that we want to compare how quickly a processor will compute our problem, not how many instructions it's going to execute. If it was a car you want to compare things like its top speed and acceleration, not something inane like engine revolutions per kilometer. You measure and compare things that are relevant to the user, not implementation details…
Unrelated to the thread but I just read that Top Fuel dragster engines only do about 240 revolutions over the 1000 foot race[1].
Never thought of it like that before so blew my mind a little.
Disappointed this is not about basketball.
Can somebody explain why a square root is also considered a flop? Surely that involves more work than the other four operations the article listed. Is there some hardware algorithm for the square root that is as fast as (e.g.) division?
Square root is pretty much equivalent to division in complexity, and computed by similar techniques (digit-by-digit methods or newton-raphson or goldschmidt iterations). Division is often a little more efficient, but square root has fewer messy edge cases (it never overflows nor underflows). Division and square root are generally slower than the other arithmetic operations, in both latency and throughput. They are fi…
Earlier quoted context omitted.
Square root is pretty much equivalent to division in complexity, and computed by similar techniques (digit-by-digit methods or newton-raphson or goldschmidt iterations). Division is often a little more efficient, but square root has fewer messy edge cases (it never overflows nor underflows). Division and square root are generally slower than the other arithmetic operations, in both latency and throughput. They are fi…
Relevant Quake engine trivia, for those that are interested: https://en.m.wikipedia.org/wiki/Fast_inverse_square_root
Anyway the question is. If you implemented fast inverse square root with out the hack. (i don't know, perhaps packing your own bits, or it might be screwball enough you only assembly could do it.) would it be as fast?
Earlier quoted context omitted.
The 1981 manual for the 8051 contains numerous references to 12MHz. http://bitsavers.informatik.uni-stuttgart.de/components/inte... It was 12T clocked: even though the clock was 12MHz, it would only operate at 1MHz / 1MIPS, because it took 12-clock-ticks to even perform one addition. IIRC, there was a standard crystal (11.0592 MHz crystal?? I forget exactly) for the communications at the time. So going just above 11…
Wow, right on page 1-2! I'm surprised -- I don't remember anything running that fast back then. Thanks. (Love those old Intel books too) Nevertheless, FWIW, MIPS started out as Vax MIPS, and at first people often used to write "VAX MIPS".
Realistic code on a 8051 runs only about 450k-800k instructions per second @12 MHz.
Earlier quoted context omitted.
> 'The' flop is a misnomer because it's almost always the multiply-and-accumulate instruction: X = A + B * C. Which... Is two operations per instruction (per shader/SIMD lane). Eeehhh whatever. Who cares about these details? If FMA is supported, it can either be counted as one or two operations, depending on the rule of the benchmark involved or the marketing of the processor. The marketing specification of a process…
Given that the point of the FLOPS unit is to compare processors, it does make more sense to count complex instructions as more than a single floating-point operation. If one CPU could multiply a 4x4 matrix by a vector in a single instruction that can run a million times per second, and another CPU needed ~32 instructions and so can only multiply 500k matrices per second but retires 16 million instructions in that sam…
A modern processor is typically superscalar, with multiple individually pipelined floating point units that can each be issued one instruction per cycle: regardless of whether that is a `fmadd`, a `fadd or something else.
If you'd issue a `fmadd` to a unit, then you are prevented from issuing a `fadd` to it in that same cycle, and vice versa. That's one op, not two.
However, floating point units are sometimes heterogeneous. I think the question should be, rather: should you count the throughput of any ops, or of arbitrary ops. In other words, if a CPU runs at 1 MHz and has two units but where only one can run `fmul`, should you count the CPU as having one or two MFLOPS?
Earlier quoted context omitted.
Given that the point of the FLOPS unit is to compare processors, it does make more sense to count complex instructions as more than a single floating-point operation. If one CPU could multiply a 4x4 matrix by a vector in a single instruction that can run a million times per second, and another CPU needed ~32 instructions and so can only multiply 500k matrices per second but retires 16 million instructions in that sam…
FLOPS is a measure of throughput. The time-difference between a `fmul` and a `fmadd` is often in latency. A modern processor is typically superscalar, with multiple individually pipelined floating point units that can each be issued one instruction per cycle: regardless of whether that is a `fmadd`, a `fadd or something else. If you'd issue a `fmadd` to a unit, then you are prevented from issuing a `fadd` to it in th…
I don't think there's enough information to answer that question. For starters, even if the CPU was issued a long sequence of nothing but additions, it's possible that it might spend some fraction of that million cycles waiting on memory.
I don't think FLOPS are counted from first principles, I think they're measured empirically using benchmarks. It's possible one benchmark will yield 1.25 MFLOPS and another 1.8 MFLOPS. Split the difference and call it a day.