31–40 of 75 posts
Lots of cool stuff in the hardware AI space https://sambanova.ai/ - Enterprise AI and dataflow-as-a-service for established moodels https://www.cerebras.net/ - AI accelerator, trying to compete with NVidia https://www.graphcore.ai/ - Another AI accelerator company - UK based https://femtosense.ai/ - Sparse NNs on very low power chips - cool hardware and software challenges https://sima.ai/ - ML accelerators for embed…
Lots of cool stuff in the hardware AI space https://sambanova.ai/ - Enterprise AI and dataflow-as-a-service for established moodels https://www.cerebras.net/ - AI accelerator, trying to compete with NVidia https://www.graphcore.ai/ - Another AI accelerator company - UK based https://femtosense.ai/ - Sparse NNs on very low power chips - cool hardware and software challenges https://sima.ai/ - ML accelerators for embed…
https://www.esperanto.ai/ - RISC-V based Tensor computes chip, Founded by Intel Hybrid Parallel Computing Vice President Dave Ditzel.
https://www.furiosa.ai/ - AI accelerator company which show good results in MLPerf benchmark.
Norwegian chip startups: - ONiO: Single-chip microcontroller with builtin energy harvesting and radio communication, enabling IoT devices without battery or dedicated charging. https://www.onio.com/ - Ascenium: Software-defined CPU without an instruction set. Highly parallel architecture with extensive compiler integration. https://www.ascenium.com/ - Disruptive Technologies: Single-chip compute + sensing with built-…
> - Ascenium: Software-defined CPU without an instruction set. Highly parallel architecture with extensive compiler integration. This is marketing BS if I've ever heard it. Their "instruction set" is LLVM. They're doing nothing more than what Transmeta (dynamic/programmable ISA) or Lisp/Arm-Java machines (running higher level code at a machine level) did before them.
> I think this falls in the 'sounds like a bad idea' bucket With enough funding, it's quite a good thing to work on. With Moore's law dead, the odds of success of weird chips got much better.
Jim Keller: Moore’s Law is Not Dead: https://www.youtube.com/watch?v=oIG9ztQw2Gc
* very cash heavy(EDA tools, IP license, engineer wage, fab money,etc)
* very challenging technically(balance of computation, power, size,etc)
* lots of work needed on the software side(compiler,SDK,optimized libs,etc)
Hardware(circuit board related) startup is already challenging(cash heavy, logistic challenges,etc), chip startup is 100x more. The later is about more than one hundred people with hundreds of millions investment to just get started.
Of course there're. Couple of examples: - https://www.sifive.com/ - RISC-V related company - https://www.cerebras.net/ - Cerebras (AI accelerator) Both of categories has other players, these are just two notable examples.
Of course there're. Couple of examples: - https://www.sifive.com/ - RISC-V related company - https://www.cerebras.net/ - Cerebras (AI accelerator) Both of categories has other players, these are just two notable examples.
OT don't use contractions "there're" at the end of a sentence, use "there are." Yesterday I saw a subtitle that did the same thing, very confusing.
I work for one now, it's very challenging * very cash heavy(EDA tools, IP license, engineer wage, fab money,etc) * very challenging technically(balance of computation, power, size,etc) * lots of work needed on the software side(compiler,SDK,optimized libs,etc) It is in a totally different world comparing to MVP or the lean startup concept. Hardware(circuit board related) startup is already challenging(cash heavy, log…
I 100% agree with your other points though. It costs an absolute fortune, and everyone always underestimates the software effort. It's probably 5-10x the hardware effort, depending on what your chip does.
Also another thing I didn't anticipate is how backwards all the tooling and people are in the chip design space. CI is a novel concept. I'm sure there are companies not using version control. Everything runs on TCL which is on par with BASIC. SystemVerilog is not a good language (though it does at least have an amazing reference manual). The standard verification method (UVM) is ok from an actual verification point of view but basically a who's who of worst practices from a programming point of view.
Maybe it's different elsewhere but I was amazed how much convincing I had to do to get people to adopt practices that are just taken for granted in the software world, like auto-formatters. There are a lot of luddites.
The only "ok this is actually pretty good" thing I've seen is formal verification which is basically magic.