AMD-powered Frontier supercomputer breaks the exascale barrier

Post by uniqueuid » Tue, May 31, 2022, 3:11 PM UTC

mihaic wrote: post #22

uniqueuid wrote: post #10

Earlier quoted context omitted.

Sure, but consumer hardware does not have infiniband or other high-bandwidth interconnects. That means you can have at most ~1-2TB of ram accessible at any point. Some problems need coordination, and when you're back at OpenMP etc., a supercomputer suddenly makes sense.

I agree right now, I'm thinking maybe in 15 years you can have >1PB on a single machine, and then those problems that don't fit in that space but that fit in a supercomputer become fewer. 2050 will be within out lifetime. Basically I'm estimating the benefit ratio to be (log SupercomputerSize - log ConsumerSize)/log ConsumerSize, and that keeps decreasing.

Post by belter » Tue, May 31, 2022, 3:14 PM UTC

dekhn wrote: post #27

belter wrote: post #21

Earlier quoted context omitted.

That was why I mentioned cache and of course we could talk MIPS.

But those are only proxy variables to explain "performance", or "throughput", or "latency". No doubt, if I wanted a fast single machine, the two configs you showed would both be nice- the former because it's an off-the-shelf part that just "runs stuff faster" than most slower processors, and the latter because it represents the limit of what a person with some infrastructure can do (although, TBH, I'd double check ev…

Post by JonChesterfield » Tue, May 31, 2022, 3:15 PM UTC

torrance wrote: post #5

uniqueuid wrote: post #2

Since they are using AMD's accelerators as well [1], I do wonder whether any usage of these will trickle down and give us improvements in ROCm. Surely the people at these labs will want to run ordinary DL frameworks at some point - or do they have the money and time to always build entirely custom stacks? [1] AMD Instinct MI250x in this case.

I’m not using Frontier, but I am using Setonix which is a large AMD cluster being rolled out in Australia. All of AMD’s teaching materials are about ROCm so this is very much how they’re expecting it to be used. The real pain for us is that there’s no decent consumer grade chips with ROCm compatibility for us to do development on. AMD have made it very clear they only care about the data centre hardware when it comes…

Post by throwawaylinux » Tue, May 31, 2022, 3:17 PM UTC

scardycat wrote: post #32

Congratulations to AMD, HPE and ORNL! This is an amazing achievement. Can't wait to see the spectacular science results coming from this installation. Intel was supposed to build the first Exascale system for ANL [1] [2]. to be installed by 2018. They completely and utterly messed up the execution, partly drive by 10nm failure, went back to the drawing board multiple times, and now Raja switched the whole thing to GP…

Post by nspattak » Tue, May 31, 2022, 3:18 PM UTC

marcosdumay wrote: post #9

dragontamer wrote: post #3

Earlier quoted context omitted.

> Surely the people at these labs will want to run ordinary DL frameworks at some point I don't know about that. A lot of these labs are doing physics simulations and are probably happy to stick with their dense-matrix multiply / BLAS routines. Deep learning is a newer thing. These national labs can run them of course, but these national labs have existed for many decades and have plenty of work to do without deep le…

> Given all the talk about OpenMP compatibility and Fortran... my guess is that they're largely running legacy code in Fortran. The must used linear algebra library is written in Fortran. There's nothing "legacy" about it, it's just that nobody was able to replicate its speed in C.