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India reveals RISC-V CPU roadmap, expects product by 2023

pib.gov.in

31–40 of 73 posts

Re: India reveals RISC-V CPU roadmap, expects product by 2023

#31

Once a working computer is available commercially, A mandate would be issued by the central government ministries to 250+ Public Sector Undertaking ( Companies with >50% govt equity) to procure only these RISCV computers. This way we can definitely bring it up to speed real fast. PS: From my experience working currently for one of those PSUs .

I doubt this will happen, even if they do issue a mandate. Indian government computers are still running windows 7 or so and its hard to get them to switch to Linux. What happens when theyre forced to run Linux and a new architecture ? All of them will just obtain exemptions to continue using windows + x86 claiming some software they need doesnt work. Teaching a 50 year govt employee how to use QEMU + Wine to emulate…

What if it is for mobile phones or tables? Everyone now a days knows to use android phone/tablets.

Re: India reveals RISC-V CPU roadmap, expects product by 2023

#32
post #6

As someone who doesn't follow RISC-V too closely, how does the most modern one (either available or planned) stack up in terms of perf compared to x86/arm? Just curious when these will begin to become viable for consumer devices. Years? Decades?

All of the commercially available RISC-V processors I'm aware of are microcontrollers -- they're competing with ARM Cortex-M. They're still a ways off from anything that can compete with ARM Cortex-A application processors or Intel/AMD desktop/laptop CPUs.

Not just controllers. There are several commercially available single board computers running Linux. Check out the "explaining computers" YouTube channel for at least a couple fairly recent board reviews.

They are slow but do exist

Re: India reveals RISC-V CPU roadmap, expects product by 2023

#33
post #17

Hopefully they'll take a holistic approach - from processor to memory to disk to kernel to application. India should have players in every aspect of technology. They should also invest more in research. Why does india have less supercomputers than sweden? Does this mean that india is doing less research in some aspects than a country of just 10 million people? https://en.wikipedia.org/wiki/TOP500 India is not and has…

Are supercomputers practical, or a vanity project?

Supposedly that depends in part on whether you are a nuclear power.

Re: India reveals RISC-V CPU roadmap, expects product by 2023

#34
post #17

Hopefully they'll take a holistic approach - from processor to memory to disk to kernel to application. India should have players in every aspect of technology. They should also invest more in research. Why does india have less supercomputers than sweden? Does this mean that india is doing less research in some aspects than a country of just 10 million people? https://en.wikipedia.org/wiki/TOP500 India is not and has…

Are supercomputers practical, or a vanity project?

They very much are practical for all sorts of research, e.g. simulations of molecular dynamics, fluid dynamics, light scattering etc, all very relevant for medical research for instance. A lot of the research work I do wouldn't really be practical without access to supercomputers, yet the results feed back into pretty much every high-tech industry.

Re: India reveals RISC-V CPU roadmap, expects product by 2023

#35
post #27

Earlier quoted context omitted.

If anything, a more streamlined frontend matters more at the high-end, because it enables more scalable decode letting you extract increased parallelism out of the code. Better use of your frontend complexity budget also makes it easier to use things like fused microinsn sequences, or the RISC-V compressed insn set which brings code density on par with x86 (an outstanding result for such a clean design) for both RV32…

Decode doesn't take up much space in a high-end processor. Even if your architecture's decoder doesn't "scale" as well, you can just throw a bunch more transistors at it to get performance. That said, I doubt there's many CPU designers unhappy about a simpler ISA...

If macro op fusion is viable then there are more opportunities to throw more transistors at it to get more performance.

Re: India reveals RISC-V CPU roadmap, expects product by 2023

#38
post #17

Hopefully they'll take a holistic approach - from processor to memory to disk to kernel to application. India should have players in every aspect of technology. They should also invest more in research. Why does india have less supercomputers than sweden? Does this mean that india is doing less research in some aspects than a country of just 10 million people? https://en.wikipedia.org/wiki/TOP500 India is not and has…

https://en.wikipedia.org/wiki/Supercomputing_in_India

Re: India reveals RISC-V CPU roadmap, expects product by 2023

#39
post #17

Hopefully they'll take a holistic approach - from processor to memory to disk to kernel to application. India should have players in every aspect of technology. They should also invest more in research. Why does india have less supercomputers than sweden? Does this mean that india is doing less research in some aspects than a country of just 10 million people? https://en.wikipedia.org/wiki/TOP500 India is not and has…

> They should also invest more in research. Why does india have less supercomputers than sweden? Does this mean that india is doing less research in some aspects than a country of just 10 million people?

India is huge, but only about 100 million Indians were considered part of the global middle class before Covid and now it's apparently only about 70 million.

And the global middle class starts at about $3500 per year, which would probably mean starvation level in Sweden.

For people with comparable incomes, India is most likely "only" 3-4 Swedens, maybe even less. So maybe 40 million people.

Poor countries, people wise, are much smaller than they seem. I come from a poor country and you can definitely feel this.

Re: India reveals RISC-V CPU roadmap, expects product by 2023

#40
post #27

Earlier quoted context omitted.

Decode doesn't take up much space in a high-end processor. Even if your architecture's decoder doesn't "scale" as well, you can just throw a bunch more transistors at it to get performance. That said, I doubt there's many CPU designers unhappy about a simpler ISA...

If macro op fusion is viable then there are more opportunities to throw more transistors at it to get more performance.

It's not yet clear if macro-op fusion will really be a thing.
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