Live data from Hacker News

New Transistor Structures At 3nm/2nm

semiengineering.com

31–40 of 82 posts

Re: New Transistor Structures At 3nm/2nm

#31

Silicon atoms are about 0.13nm apart. 2nm is about 15 atoms wide. Mass producing anything on that scale is an exceptional feat.

>Mass producing anything on that scale is an exceptional feat.

Mass producing anything on that scale that will then go on working for years at ~ 3Billion movements per second reliably is simply astounding.

Re: New Transistor Structures At 3nm/2nm

#32

One thing I've always wondered about when it comes to new process design at smaller scale: how much actual quantum mechanics is actually needed to get the job done? And ... if the answer is, as I suspect, a lot, what kind of numerical methods and processes are used to design and simulate these tiny quantum mechanical machines? [EDIT] I mean, when taking a basic QM course, there is a lot of contorsions to try and find…

Full disclosure, I don't work on processors but am in a tangentially related field.

However, I don't feel that you need to have an analytical solution to the Schrödinger equation. In fact even in chemistry we don't do analytical solutions instead using fancy basis sets which allow us to do approximations.

Regardless, I don't think even that is particularly necessary, as quantum at that level means you basically have some level of leakage where the electrons can just tunnel through the barrier created by the transistor when off. So if I had to guess most of it is just ways to rectify this leakage so it doesn't effect calculations, probably similar to a form of error correcting.

(This ignores that you may have to do some initial quantum calculations using Density Functional Theorem to get a guess at how much leakage based off the materials you are using, though if I had to guess most of that work was done a while ago.)

Re: New Transistor Structures At 3nm/2nm

#33
post #17

Silicon atoms are about 0.13nm apart. 2nm is about 15 atoms wide. Mass producing anything on that scale is an exceptional feat.

It's the closest thing to black magic mankind has achieved.

> We have captured the lightning in a rock and taught it to think.

Re: New Transistor Structures At 3nm/2nm

#35
post #8
post #3

Rather than the change in transistor design, I think the bigger news is the switch from silicon with dopants to silicon with germanium and dopants. The drop in threshold voltage from ~0.7v to ~0.3v might be one of the last levers left in extracting even more performance; at the cost of making semi production and equipment even more hazardous.

According to the article, the new transistor design offers the promise of lower leakage.

Per transistor maybe, but the leakage goes down less than the amount of transistors you can pack per area, so in effect, per die/chip your leakage increases. Heat as well, but it’s the other side of the same coin.

Re: New Transistor Structures At 3nm/2nm

#36

One thing I've always wondered about when it comes to new process design at smaller scale: how much actual quantum mechanics is actually needed to get the job done? And ... if the answer is, as I suspect, a lot, what kind of numerical methods and processes are used to design and simulate these tiny quantum mechanical machines? [EDIT] I mean, when taking a basic QM course, there is a lot of contorsions to try and find…

Depends on what you mean by get the job done. (Rather which job)

If you are doing research into designing advanced transistors with new geometry or new materials (which is what I did my graduate research in), you would be using something like DFT (Density functional theory) for equilibrium analysis and NEGF, Huckel theory etc. for simulating current. These methods only realistically work on ~500-1000 atom systems, beyond which the simulation takes too long to run even on supercomputers (which is what i was using). I think GPUs here would be very useful, but there weren't any tools at the time that were seriously optimized for GPU. The codes I was using were SIESTA/TransSIESTA, Atomistix, QuantumEspresso and others.

For simulating multiple transistors, or transistors with a large geometry (for example 14nm gate length), you would use TCAD simulators that use FEM + measured parameters to simulate the transistors. The equations behind these are traditional semiconductor equations with a bunch of heuristics and curve fitting. The main tool I used was Sentaurus TCAD.

For simulating larger circuits, say a low-noise amplifier or maybe a small DAC, you would use tools like Cadence Virtuoso + the provided PDK from your foundry. The equations here are simpler than the ones used in Sentaurus and they are also calibrated to measurement.

Re: New Transistor Structures At 3nm/2nm

#37
post #7

Earlier quoted context omitted.

Would you mind explaining how the production becomes more hazardous?

I think parent might have confused Germanium with Cadmium? I am no chemist. It could also require other more toxic substances to control reactions or act a carrier. The whole area around Sunnyvale is littered with toxic waste dumps from semiconductor manufacturing. [1] From [2], it says, "Some reactive intermediate compounds of germanium are poisonous", when then references [3] but I can't find the specific citation.…

Fairchild in south San Jose too. When I was at ST High School in the mid 90s calling other kids a Fairchild settlement kid was an insult. https://www.kqed.org/news/11630861/how-silicon-valley-indust...

Re: New Transistor Structures At 3nm/2nm

#38

One thing I've always wondered about when it comes to new process design at smaller scale: how much actual quantum mechanics is actually needed to get the job done? And ... if the answer is, as I suspect, a lot, what kind of numerical methods and processes are used to design and simulate these tiny quantum mechanical machines? [EDIT] I mean, when taking a basic QM course, there is a lot of contorsions to try and find…

Solid State Physics has a bunch of different types of models to try to explain the behavior of electrons in semiconductors and conductors. Most of them are only valid under specific situations and they sometimes give erroneous results unless you apply them carefully. That being said, your absolutely right that the industry uses approximations. They usually use some kind of simulation physics package similar to the ones used by EE engineers when designing circuits.

Re: New Transistor Structures At 3nm/2nm

#39
post #19
post #7

Earlier quoted context omitted.

I think parent might have confused Germanium with Cadmium? I am no chemist. It could also require other more toxic substances to control reactions or act a carrier. The whole area around Sunnyvale is littered with toxic waste dumps from semiconductor manufacturing. [1] From [2], it says, "Some reactive intermediate compounds of germanium are poisonous", when then references [3] but I can't find the specific citation.…

> The whole area around Sunnyvale is littered with toxic waste dumps from semiconductor manufacturing. Makes me wonder how this is dealt with in Taiwan.

There is a reason those kinds of industries avoid "the west".

Re: New Transistor Structures At 3nm/2nm

#40
post #26

Earlier quoted context omitted.

It's crazy to think about if you've never thought about this, but the speed of light is a bottleneck for processors. When we get smaller devices, there's literally less distance that needs to be traversed, so more can be done!

> the speed of light is a bottleneck for processors It's not the speed of light [in a vacuum], but electric signal propagation speed in copper.

And the "electric signal" is an electromagnetic wave- also known as light. Nowhere did they imply the speed of light in a vacuum, the speed of light in copper is an equally valid interpretation.
Post reply on HN