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Clocking a 6502 simulator to 15GHz

scarybeastsecurity.blogspot.com

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Re: Clocking a 6502 simulator to 15GHz

#31

Post by tyingq »

kabdib wrote: post #3

I was told by Leonard Tramiel (who was my manager at Atari for a while) that the world record for a production 6502 was 25Mhz. This was demonstrated one Friday evening, some time after the beer fridge had been opened in one of the labs. I don't know if they applied any kind of external cooling, or what the benchmark was. Probably it was "keep cranking up the clock until pins stop wiggling or smoke comes out." Not ver…

There's an FPGA 65C02 core running at ~73Mhz. https://github.com/MorrisMA/MAM65C02-Processor-Core

Re: Clocking a 6502 simulator to 15GHz

#32

Post by [deleted] »

woodrowbarlow wrote: post #13
londons_explore wrote: post #11

It would be interesting to compare this project to simply converting 6502 assembly into LLVM IR, and letting clangs optimization passes work their magic. Obviously self modifying code would be hard to handle, but every other case ought to work, and the auto-vectorization ought to do amazing things to some loop-heavy code.

a 6502 backend for LLVM has been attempted a couple times[1][2], but the fact that the 6502 only has three registers imposes severe limitations w.r.t. LLVM's calling conventions. [1] https://github.com/c64scene-ar/llvm-6502 [2] https://github.com/beholdnec/llvm-m6502

[deleted]

Re: Clocking a 6502 simulator to 15GHz

#33

Post by duskwuff »

tyingq wrote: post #31
kabdib wrote: post #3

I was told by Leonard Tramiel (who was my manager at Atari for a while) that the world record for a production 6502 was 25Mhz. This was demonstrated one Friday evening, some time after the beer fridge had been opened in one of the labs. I don't know if they applied any kind of external cooling, or what the benchmark was. Probably it was "keep cranking up the clock until pins stop wiggling or smoke comes out." Not ver…

There's an FPGA 65C02 core running at ~73Mhz. https://github.com/MorrisMA/MAM65C02-Processor-Core

18 MHz, actually -- the FPGA clock speed is 73 MHz, but it executes the equivalent of one 6502 clock cycle in four of its clocks.

That being said, this was implemented on a budget-line FPGA from 2006 (XC3S50A - a small Xilinx Spartan-3A). A modern performance-line FPGA would probably hit a couple hundred MHz easily.

Re: Clocking a 6502 simulator to 15GHz

#34

Post by duskwuff »

variaga wrote: post #27
paulmd wrote: post #15

Earlier quoted context omitted.

"until pins stop wiggling"?

The pins don't physically wiggle. "pins wiggling" is a common metaphor for "the voltage level on a pin is changing". As a signal driver is toggled at increasing frequencies ('cranking up the clock'), the signal amplitude (voltage difference between the 'high' and 'low' period) starts to drop. At a high enough frequency, the signal will be indistinguishable from noise and 'stops wiggling'.

> At a high enough frequency, the signal will be indistinguishable from noise and 'stops wiggling'.

It's not that the signal will be indistinguishable from noise, but that the CPU will stop working correctly, so its outputs will stop toggling (or will toggle in unexpected ways).

Re: Clocking a 6502 simulator to 15GHz

#35

Post by scarybeast »

dr_zoidberg wrote: post #25
scarybeast wrote: post #14

Earlier quoted context omitted.

A lot of BBC BASIC programs, doing real work (e.g. Mandelbrot drawing etc.), should have a shot at 10GHz. Games are slower because they are hammering hardware registers external to the JIT (sound, graphics, keyboard polling, timing, etc.) My laptop is an ancient 5th gen i5 with 2 keys having fallen off, so games are down in the 2GHz - 3GHz range for me. (Perhaps the missing keys make all the difference.)

I understand that some people look suspiciously at the 15GHz mark, specially considering this was run in a 4.5GHz processor. What I understand is that this benchmarks are comparing how long it would've taken on a stock 1Mhz 6502, and calculate the "clock speed" obtained as a ratio. So if I'm getting my result 10,000 times faster than a standard 6502, it means I'm at 10GHz. I also understand that this is possible beca…

I like the framing here, that of seeing this as a showcase of modern superscalar improvements. And yes, it's about single core performance only.

What is particularly interesting to me is how thoroughly superscalar "wins". Because of complexities with 6502 -> x64 mapping, and handling self-modifying code in particular, some of the most common 6502 instructions explode to multiple x64 instructions. Despite that huge extra instruction load, the translation still manages to run at much greater speed than a 1:1 instruction ratio.

Modern processors do not run on electrons. They run on unicorn tears and magic.

Re: Clocking a 6502 simulator to 15GHz

#36

Post by duskwuff »

dr_zoidberg wrote: post #25
scarybeast wrote: post #14

Earlier quoted context omitted.

A lot of BBC BASIC programs, doing real work (e.g. Mandelbrot drawing etc.), should have a shot at 10GHz. Games are slower because they are hammering hardware registers external to the JIT (sound, graphics, keyboard polling, timing, etc.) My laptop is an ancient 5th gen i5 with 2 keys having fallen off, so games are down in the 2GHz - 3GHz range for me. (Perhaps the missing keys make all the difference.)

I understand that some people look suspiciously at the 15GHz mark, specially considering this was run in a 4.5GHz processor. What I understand is that this benchmarks are comparing how long it would've taken on a stock 1Mhz 6502, and calculate the "clock speed" obtained as a ratio. So if I'm getting my result 10,000 times faster than a standard 6502, it means I'm at 10GHz. I also understand that this is possible beca…

> I also understand that this is possible because the emulator is running on a superscalar processor.

It's also possible because the minimal architecture of the 6502 makes it inherently inefficient. With only three 8-bit registers -- which can't even be used interchangeably! -- and a non-addressable stack, a lot of CPU time on the 6502 is spent shuffling data around. Consider adding two 32-bit numbers, for example. On a 6502, this is a minimum of 38 cycles (clc + (lda, adc, sta) x4); an x86 can complete the same operation in one cycle, potentially in parallel with other operations.

Re: Clocking a 6502 simulator to 15GHz

#37

Post by dodo6502 »

halotrope wrote: post #21

After stumbling on Ben Eaters “Hello world from scratch” [1] I went out and bought the cpu some parts and breadboards. The chip is only a few dollars. It is highly recommended if you want to dive down into computers and digital logic on first principles. Also great fun to get a break from all the screens and layers upon layers of software that I have to deal with daily. 1. https://youtu.be/LnzuMJLZRdU

Kind of plugging my own project here, but I too am a software developer that found great joy from breaking away from all the layers of abstraction and working directly with the hardware. I created a portable game system with the 6502:

http://www.dodolabs.io/

Re: Clocking a 6502 simulator to 15GHz

#38

Post by userbinator »

I believe VMware without hardware support for virtualisation also falls back to "binary translation" and similarly gets tripped by SMC - I don't recall the details right now but one of the ways to detect it was to modify an instruction in an obscure way that the developers had forgotten about.

Re: Clocking a 6502 simulator to 15GHz

#39

Post by cmrdporcupine »

tyingq wrote: post #31
kabdib wrote: post #3

I was told by Leonard Tramiel (who was my manager at Atari for a while) that the world record for a production 6502 was 25Mhz. This was demonstrated one Friday evening, some time after the beer fridge had been opened in one of the labs. I don't know if they applied any kind of external cooling, or what the benchmark was. Probably it was "keep cranking up the clock until pins stop wiggling or smoke comes out." Not ver…

There's an FPGA 65C02 core running at ~73Mhz. https://github.com/MorrisMA/MAM65C02-Processor-Core

A new stock 65c02 from WDC can do 20mhz. So this FPGA version @ 18mhz doesn't sound any better. Though I'm sure on a modern FPGA one can do more than that.

Re: Clocking a 6502 simulator to 15GHz

#40

Post by baybal2 »

duskwuff wrote: post #33
tyingq wrote: post #31

Earlier quoted context omitted.

There's an FPGA 65C02 core running at ~73Mhz. https://github.com/MorrisMA/MAM65C02-Processor-Core

18 MHz, actually -- the FPGA clock speed is 73 MHz, but it executes the equivalent of one 6502 clock cycle in four of its clocks. That being said, this was implemented on a budget-line FPGA from 2006 (XC3S50A - a small Xilinx Spartan-3A). A modern performance-line FPGA would probably hit a couple hundred MHz easily.

It's still surprising how little relatively to the level of perceived performance have IPC count improved since seventies.
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