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On FPGAs as PC Coprocessors (1996)

fpgacpu.org

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Re: On FPGAs as PC Coprocessors (1996)

#31
post #29

The article seems to say FPGA on a high latency bus can only accelerate workload that are streamed via DMA, and implies that a general purpose accelerator has to be closer to the CPU. Sounds like a coprocessor, like putting an FPGA into the slot where the 8087 used to be. That made me think, why not get even closer? Why not have an FPGA as execution unit? Modern CPUs have multiple ALUs, multiple FPUs, multiple vector…

It has been researched: Alessandro Forin's eMIPS research project was on integrating FPGA fabric as an execution unit.

Project page: https://www.microsoft.com/en-us/research/project/emips/

Research paper: https://www.microsoft.com/en-us/research/wp-content/uploads/...

Back then Moore's Law was still going full steam so there wasn't much interest but, who knows, maybe that will change in a few years.

Re: On FPGAs as PC Coprocessors (1996)

#32
post #28

Earlier quoted context omitted.

Most FPGAs that are viable accellerators aren't for hobbyists but they also are not as expensive as you think. I can't find it anymore but I once saw an online shop with a huge variety of 500k+ LUT FPGA modules (just the chip itself on a small PCB) for around 1000€ + 500€ breakoutboard/mainboard. At those prices it makes more sense as an individual to invest into more CPU cores or a GPU (if your problem maps to it).…

How much time would it take to synthesize 500K-lut design on a high-end workstation?

Around 5 hours.

Re: On FPGAs as PC Coprocessors (1996)

#33

Earlier quoted context omitted.

Because 2 FPGA cores don't give you the same bang for your computational buck as 2/4 general purpose cores. You're better off hanging an FPGA off a fast internal bus with an expansion card, rather than try and cram an FPGA on a CPU die. Think of them like graphics cards, but even more niche. Trying to stick them directly into the CPU isn't going to provide the power of a dedicated add on.

Although if they are on-die, you can benefit from shared L2/L3 cache, and lower power/increased performance of the CPU-FPGA coupling, shared memory path (lower cost than dedicated, although they can compete/starve each other if there isn't good synergy at the OS level.)

Yeah, the problem is any FPGA solution that integrates directly with the CPU cache is going to be a bit underpowered due to fitting on the silicon. Even the integrated CPU/FPGA SoCs I've seen have the ARM core separated by an interconnect
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