31–40 of 51 posts
I've only had a passing interest in learning assembly. It's always been in the "maybe one day" category. But after learning about how small the RISC-V instruction set is (less than 50 apparently, but I can't find a citation for that anywhere), I'm far more motivated to get into it.
The HiFive1 is a low-cost, Arduino-compatible development board featuring the Freedom E310 making it the best way to start prototyping and developing your RISC‑V applications. Not only can the HiFive1 help build RISC-V platforms, but it is also the first commercially available option to do so! The HiFive1 can simply be plugged into your computer via the micro USB port located to the front of the board. Additionally, the HiFive1 comes programmed with a simple bootloader and a demo software, that way you aren’t restricted to the Arduino IDE if you don’t choose to do so.
I've only had a passing interest in learning assembly. It's always been in the "maybe one day" category. But after learning about how small the RISC-V instruction set is (less than 50 apparently, but I can't find a citation for that anywhere), I'm far more motivated to get into it.
When can I buy an affordable, complete RISC-V computer? I've been long planning to cook my own with FPGA but it seems like soon we'll start getting affordable RISC-V CPUs with other utility support?
With QEMU you can already do amazing things. Every component required by Linux From Scratch has been stable, and you can get a Fedora/Debian image for that as well.
When can I buy an affordable, complete RISC-V computer? I've been long planning to cook my own with FPGA but it seems like soon we'll start getting affordable RISC-V CPUs with other utility support?
The LowRisc project seems to have the mission you're looking for: "What are the goals of the project? To create a fully open SoC and low-cost development board and to support the open-source hardware community. This will involve volume silicon manufacture..." They have 2 folks with prior experience on the Rpi team. But, it's hard to tell when they might have something ready. http://lowrisc.org
The upshot of this is you can run lowRISC 0.6 on something like the Nexys 4 DDR (other FPGAs are available) and have a real Linux distro running on an FPGA, rather slowly and with limited RAM. They even managed to make the ethernet port work using an entirely free stack (though you still unfortunately need Vivado for a while to compile it) and it's a step towards having an ASIC that is completely freely licensed. So it's still baby-steps but I'm glad the lowRISC project came back to life.
What would be the use case for a 320 MHz processor with 16 KiB RAM? Even ESP8266 has 80 KiB and runs at 80 MHz.
Hmm, does it really have only 16 KiB of RAM or am I misinterpreting the spec? What would be the use case for a 320 MHz processor with 16 KiB RAM? Even ESP8266 has 80 KiB and runs at 80 MHz.
I've only had a passing interest in learning assembly. It's always been in the "maybe one day" category. But after learning about how small the RISC-V instruction set is (less than 50 apparently, but I can't find a citation for that anywhere), I'm far more motivated to get into it.
I'm not sure that's a useful metric; in almost all architectures there's a "core" set which gets used the vast majority of the time in most programs, plus an increasing number of extensions for very specific purposes. You could start today on ARM with the top 20 instructions and get quite a long way.
Earlier quoted context omitted.
Some progress reported a few months back https://news.ycombinator.com/item?id=17642872
Unfortunately with RV64G, not RV64GC (which is targeted by Linux distributions and the BSDs). Something they can fix, but this iteration's going to be not very convenient because of that.