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Apple Is Working on a Dedicated Chip to Power AI on Devices

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Re: Apple Is Working on a Dedicated Chip to Power AI on Devices

#31

Post by indy »

mtgx wrote: post #3
wyldfire wrote: post #2

> . The chip, known internally as the Apple Neural Engine, Is this a real IC/processor for arbitrary software or an abstraction of an underlying GPU/DSP?

Most likely some kind of dedicated deep learning accelerator. This is coming with or without Apple: > Exynos 8895 features VPU (Vision Processing Unit) which is designed for machine vision technology. This technology improves the recognition of an item or its movements by analyzing the visual information coming through the camera. Furthermore, it enables advanced features such as corner detection that is frequently u…

> I was also hoping that with Google's high-efficiency for the TPU, they would make a version for mobile as well

At Google IO there was a slide during the keynote that they're working with Mediatek to produce a mobile TPU

Re: Apple Is Working on a Dedicated Chip to Power AI on Devices

#32

Post by imh »

highd wrote: post #14

This is probably going to be a hyper parallel fixed point / integer engine like TPU gen1. Doing fast matrix multiply over really small fields is very subpar on CPUs and GPUs. That was the initial reasoning behind TPU gen1 - improving runtime performance. One question is if it will architecturally be closer to a GPU or an FPGA. The field moves so fast that it might make sense to "future-proof" a bit with a live-reconf…

How do FPGAs compare on space and power? Would differences be enough to matter for mobile?

Re: Apple Is Working on a Dedicated Chip to Power AI on Devices

#33

Post by asimpletune »

cft wrote: post #25
spott wrote: post #21

Earlier quoted context omitted.

The flip side is that there is pretty obviously a market for such a product. If it isn't released by google or apple, it will be released by someone else. If it isn't, then that is a pretty good idea for a startup.

Only well funded startups will make ASICs.And most of them will fail. This is very different from many small startups programming general purpose computers.

So then maybe the key is a start up that's in the business of raising the chance of success that other players having in this endeavor?

Re: Apple Is Working on a Dedicated Chip to Power AI on Devices

#35

Post by deepnotderp »

Well....

This is interesting indeed, although I suppose it was somewhat inevitable.

I'm definitely interested in the architectural details of the chip, but I doubt Apple will open up. Apple has control of the software stack and by extension, what models will run on this chip, so I expect that it will be a little bit more special purpose than general purpose.

Re: Apple Is Working on a Dedicated Chip to Power AI on Devices

#36

Post by highd »

imh wrote: post #32
highd wrote: post #14

This is probably going to be a hyper parallel fixed point / integer engine like TPU gen1. Doing fast matrix multiply over really small fields is very subpar on CPUs and GPUs. That was the initial reasoning behind TPU gen1 - improving runtime performance. One question is if it will architecturally be closer to a GPU or an FPGA. The field moves so fast that it might make sense to "future-proof" a bit with a live-reconf…

How do FPGAs compare on space and power? Would differences be enough to matter for mobile?

I don't think space is an issue, but an ASIC designed exactly for a workload will always beat an FPGA on power. But if you don't know the workload exactly or don't have the money to fab an ASIC then an FPGA will be superior if the workload is a bad fit for CPUs or GPUs. So if you can save (2-10)x power on some unknown ML workload in the future that might be preferable to (10-20)x on some fixed workload with a fixed-point ASIC.

I.e. Bitcoin mining went GPU->FPGA->ASIC, each with more investment required to design but higher overall performance in Hash/W. But that workload is known exactly.

Re: Apple Is Working on a Dedicated Chip to Power AI on Devices

#37

Post by aswanson »

imh wrote: post #32
highd wrote: post #14

This is probably going to be a hyper parallel fixed point / integer engine like TPU gen1. Doing fast matrix multiply over really small fields is very subpar on CPUs and GPUs. That was the initial reasoning behind TPU gen1 - improving runtime performance. One question is if it will architecturally be closer to a GPU or an FPGA. The field moves so fast that it might make sense to "future-proof" a bit with a live-reconf…

How do FPGAs compare on space and power? Would differences be enough to matter for mobile?

Probably worse on power consumption as well as price per MIP.

Re: Apple Is Working on a Dedicated Chip to Power AI on Devices

#38

Post by blackguardx »

imh wrote: post #32
highd wrote: post #14

This is probably going to be a hyper parallel fixed point / integer engine like TPU gen1. Doing fast matrix multiply over really small fields is very subpar on CPUs and GPUs. That was the initial reasoning behind TPU gen1 - improving runtime performance. One question is if it will architecturally be closer to a GPU or an FPGA. The field moves so fast that it might make sense to "future-proof" a bit with a live-reconf…

How do FPGAs compare on space and power? Would differences be enough to matter for mobile?

FPGAs are pretty bad space-wise and power-wise compared to straight up ASICs. Apple could make some blocks highly configurable, but even an FPGA designer wouldn't use FPGA fabric to do multiplication if they cared about performance. FPGAs are a mix of general purpose logic blocks (the fabric) and dedicated blocks like multipliers, dividers, PLLs, memory, serializers and deserializers, etc.

Re: Apple Is Working on a Dedicated Chip to Power AI on Devices

#40

Post by blackguardx »

highd wrote: post #36
imh wrote: post #32

Earlier quoted context omitted.

How do FPGAs compare on space and power? Would differences be enough to matter for mobile?

I don't think space is an issue, but an ASIC designed exactly for a workload will always beat an FPGA on power. But if you don't know the workload exactly or don't have the money to fab an ASIC then an FPGA will be superior if the workload is a bad fit for CPUs or GPUs. So if you can save (2-10)x power on some unknown ML workload in the future that might be preferable to (10-20)x on some fixed workload with a fixed-p…

Space is only an issue because it is directly correlated with unit cost.
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