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If you don't click through to read about this: you can write an FPGA image in verilog/VHDL and upload it... and then run it. To me that seems like magic. HDK here: https://github.com/aws/aws-fpga (I work for AWS)
Quick Question: If anyone wants to learn programming an FPGA is learning C only way to go ? how hard is to learn and program in verilog/VHDL without electrical background ? If anyone suggests links or books, please do Thank You
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The latencies from AWS servers to the exchanges probably would make HFT applications unfeasible.
Not when you use Amazon's new regions, us-fin-1, that is within the exchange's datacenter. /s?
Very interesting. I'd still like to see the JVM pick up the FPGA as a possible compile target, that way people could run apps that seamlessly used the FPGA where appropriate. I have mentioned this to Intel, who are promoting this technology (and also have a team that contributes to the JVM), but so far no one is stating publicly that they are working on such a thing.
Because the model is so different there would be no benefit.
> Today we are launching a developer preview of the new F1 instance. In addition to building applications and services for your own use, you will be able to package them up for sale and reuse in AWS Marketplace. Wow. An app store for FPGA IPs and the infrastructure to enable anyone to use it. That's really cool.
I guess this will be a game changer for FPGA-mineable digital currencies. Maybe not for Bitcoin, because people have invested heavily into dedicated mining hardware, but I'm interested to see what it'll do for the smaller altcoins.
The thing is, it seems like people always invest heavily into dedicated hardware when using FPGAs. I'll be interested to see what people actually end up using this service for.
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Because the model is so different there would be no benefit.
Intel already have a compression library as a proof of concept that shows a large benefit. The JVM compiler knows A) how many instructions each method is and B) how CPU hot it is. Just with a compression library, the compiler could identify very hot and very small methods and test them on the FPGA, in parallel to normal execution, and measure the performance difference, and switch to the FPGA if it was beneficial (wh…
Approaches do exist to automatically translate some types of code to run on an FPGA, though.
> Xilinx UltraScale+ VU9P fabricated using a 16 nm process. > 64 GiB of ECC-protected memory on a 288-bit wide bus (four DDR4 channels). > Dedicated PCIe x16 interface to the CPU. Does anyone know whether this is likely to be a plug-in card? and can I buy one to plug in to a local machine for testing?
Even if it does, this can easily sell for $10k+.
> Today we are launching a developer preview of the new F1 instance. In addition to building applications and services for your own use, you will be able to package them up for sale and reuse in AWS Marketplace. Wow. An app store for FPGA IPs and the infrastructure to enable anyone to use it. That's really cool.
Earlier quoted context omitted.
Because the model is so different there would be no benefit.
Intel already have a compression library as a proof of concept that shows a large benefit. The JVM compiler knows A) how many instructions each method is and B) how CPU hot it is. Just with a compression library, the compiler could identify very hot and very small methods and test them on the FPGA, in parallel to normal execution, and measure the performance difference, and switch to the FPGA if it was beneficial (wh…