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GPT‑5.3‑Codex‑Spark

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Re: GPT‑5.3‑Codex‑Spark

#291

Post by postalcoder »

HumanOstrich wrote: post #283
postalcoder wrote: post #108

First thoughts using gpt-5.3-codex-spark in Codex CLI: Blazing fast but it definitely has a small model feel. It's tearing up bluey bench (my personal agent speed benchmark), which is a file system benchmark where I have the agent generate transcripts for untitled episodes of a season of bluey, perform a web search to find the episode descriptions, and then match the transcripts against the descriptions to generate f…

Yea it's been butchering relatively easy to moderate tasks for me even with reasoning set to high. I am hoping it's just tuning that needs to be done since they've had to port it to a novel architecture. If instead the model is performing worse due to how much they had to shrink it just so it will fit on Cerebras hardware, then we might be in for a long wait for the next gen of ginormous chips.

Agree w/ you on the model's tendency to butcher things. Performance wise, this almost feels like the GPT-OSS model.

I need to incorporate "risk of major failure" into bluey bench. Spark is a dangerous model. It doesnt strongly internalize the consequences of the commands that it runs, even on xhigh. As a result I'm observing a high tendency to run destructive commands.

For instance, I asked it to assign random numbers to the filename of the videos in my folder to run the bm. It accidentally deleted the files on most of the runs. The funniest part about it is that it comes back to you within a few seconds and says something like "Whoops, I have to keep it real, I just deleted the files in your folder."

Re: GPT‑5.3‑Codex‑Spark

#292

Post by HumanOstrich »

postalcoder wrote: post #291
HumanOstrich wrote: post #283

Earlier quoted context omitted.

Yea it's been butchering relatively easy to moderate tasks for me even with reasoning set to high. I am hoping it's just tuning that needs to be done since they've had to port it to a novel architecture. If instead the model is performing worse due to how much they had to shrink it just so it will fit on Cerebras hardware, then we might be in for a long wait for the next gen of ginormous chips.

Agree w/ you on the model's tendency to butcher things. Performance wise, this almost feels like the GPT-OSS model. I need to incorporate "risk of major failure" into bluey bench. Spark is a dangerous model. It doesnt strongly internalize the consequences of the commands that it runs, even on xhigh. As a result I'm observing a high tendency to run destructive commands. For instance, I asked it to assign random number…

Ouch, at least it fesses up. I ran into problems with it first refusing to use git "because of system-level rules in the session". Then later it randomly amended a commit and force pushed it because it made a dumb mistake. I guess it was embarassed.

Re: GPT‑5.3‑Codex‑Spark

#294

Post by energy123 »

DeathArrow wrote: post #289
ElijahLynn wrote: post #210

Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…

>Wow, I wish we could post pictures to HN. That chip is HUGE!!!! Using a waffer sized chip doesn't sound great from a cost perspective when compared to using many smaller chips for inference. Yield will be much lower and prices higher. Nevertheless, the actual price might not be very high if Cerebras doesn't apply an Nvidia level tax.

> Yield will be much lower and prices higher.

That's an intentional trade-off in the name of latency. We're going to see a further bifurcation in inference use-cases in the next 12 months. I'm expecting this distinction to become prominent:

(A) Massively parallel (optimize for token/$)

(B) Serial low latency (optimize for token/s).

Users will switch between A and B depending on need.

Examples of (A):

- "Search this 1M line codebase for DRY violations subject to $spec."

An example of (B):

- "Diagnose this one specific bug."

- "Apply this diff".

(B) is used in funnels to unblock (A). (A) is optimized for cost and bandwidth, (B) is optimized for latency.

Re: GPT‑5.3‑Codex‑Spark

#295

Post by DeathArrow »

onlyrealcuzzo wrote: post #109
pjs_ wrote: post #66

Continue to believe that Cerebras is one of the most underrated companies of our time. It's a dinner-plate sized chip. It actually works. It's actually much faster than anything else for real workloads. Amazing

Nvidia seems cooked. Google is crushing them on inference. By TPUv9, they could be 4x more energy efficient and cheaper overall (even if Nvidia cuts their margins from 75% to 40%). Cerebras will be substantially better for agentic workflows in terms of speed. And if you don't care as much about speed and only cost and energy, Google will still crush Nvidia. And Nvidia won't be cheaper for training new models either.…

What puzzles me is that AMD can't secure any meaningful size of AI market. They missed this train badly.

Re: GPT‑5.3‑Codex‑Spark

#296

Post by magicalhippo »

DeathArrow wrote: post #289
ElijahLynn wrote: post #210

Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…

>Wow, I wish we could post pictures to HN. That chip is HUGE!!!! Using a waffer sized chip doesn't sound great from a cost perspective when compared to using many smaller chips for inference. Yield will be much lower and prices higher. Nevertheless, the actual price might not be very high if Cerebras doesn't apply an Nvidia level tax.

As I understand it the chip consists of a huge number of processing units, with a mesh network between them so to speak, and they can tolerate disabling a number of units by routing around them.

Speed will suffer, but it's not like a stuck pixel on an 8k display rendering the whole panel useless (to consumers).

Re: GPT‑5.3‑Codex‑Spark

#297

Post by DeathArrow »

CamperBob2 wrote: post #208
onlyrealcuzzo wrote: post #150

Earlier quoted context omitted.

> Largest production capacity maybe? Anyone can buy TSMC's output...

Which I'm sure is 100% reserved through at least 2030.

Aren't they building new fabs, though? Or even those are already booked?

Re: GPT‑5.3‑Codex‑Spark

#298

Post by larodi »

ElijahLynn wrote: post #210

Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…

Is all of it one chip? Seems like a waffer with several at least?

Re: GPT‑5.3‑Codex‑Spark

#299

Post by troupo »

> Our latest frontier models have shown particular strengths in their ability to do long-running tasks, working autonomously for hours, days or weeks without intervention.

Both OpenAI and Anthropic keep peddling this bullshit when their "frontier models" can bsrely keep context for 2 minutes on a dozen kLOC project.

Re: GPT‑5.3‑Codex‑Spark

#300

Post by txyx303 »

larodi wrote: post #298
ElijahLynn wrote: post #210

Wow, I wish we could post pictures to HN. That chip is HUGE!!!! The WSE-3 is the largest AI chip ever built, measuring 46,255 mm² and containing 4 trillion transistors. It delivers 125 petaflops of AI compute through 900,000 AI-optimized cores — 19× more transistors and 28× more compute than the NVIDIA B200. From https://www.cerebras.ai/chip : https://cdn.sanity.io/images/e4qjo92p/production/78c94c67be9... https://cd…

Is all of it one chip? Seems like a waffer with several at least?

Those are scribe lines where you usually would cut out chips which is why it resembles multiple chips. However, they work with TSMC to etch across them.
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