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I'm glad you liked it! Yeah, with (PC)+ (27), you didn't need a separate immediate addressing mode where you tried to stuff an operand such as 2 into the leftover bits in the instruction word; you could just put your full-word-sized immediate operands directly in the instruction stream, the way you did with subroutine parameters on the PDP-8. And there was a similar trick for @(PC)+ (37) where you could include the 1…
I rewrote my Empire game in PDP-11 assembler, long ago: https://github.com/DigitalMars/Empire-for-PDP-11 but I have little knowledge of how the CPU works internally. One could learn the -11 instruction set in a half hour, but learning the AArch64 is a never-ending quest. 2000 instructions!
As for ARM64, sure, but I'm not talking about ARM64, in case that wasn't just a randomly chosen unmanageable architecture. Check out the VLSI ARM3. All 26 instructions are listed in Table 1 on the bottom of page 1–7 of the datasheet: https://www.chiark.greenend.org.uk/~theom/riscos/docs/ARM3-d...
That's cheating a little bit because it doesn't include the addressing modes, conditionals, and bit shifts and rotations, because those are bitfields in other instructions, but even so, it's not cheating much. You can still learn the whole instruction set in an afternoon (though not half an hour!), and it's an instruction set that can be implemented much more efficiently than most ISAs before or since.