221–230 of 337 posts
P.S. the Holy Church of Progress keeps flagging the herecy of I-Ching out of existence, may it prevail in its glorious ways. Curious fact: expressing your disagreement in written form takes more neurons than flagging reflex does. Try and ye shall succeed!
According to their blog post[1], there is little you can do against this. Running different applications on different cpus help against them reading each other’s data but an rogue process can still read data from the “super ordinated kernel” or hypervisor.
Of course you can fix it. I fixed it in Dec 2018 for most such attacks in my safelibc memset_s implementation, but nobody wanted to use it, because securely purging the buffers with secrets via mfence was deemed to slow. So everybody can read your secrets via sidechannel attacks. These tiny MDS buffers need to be purged with verw or l1d_flush followed by an lfence. This needs to be added to memset and memset_s varian…
Earlier quoted context omitted.
OoO without speculation is completely pointless: the tipical reorder window is orders of magnitude larger than the average number of instructions between conditional jumps. I don't think there have ever been an OoO CPU without speculation. OTOH speculation without OoO Is not only possible but in fact very common. For example the majority of non ancient in-order CPUs. In fact the original pentium, contrary to your sta…
> I don't think there have ever been an OoO CPU without speculation. To the extent I've looked at it, without reading original documents, the original OoO design that current systems are based on, the IBM System 360/Models 91 and 95's floating point unit using Tomasulo's algorithm https://en.wikipedia.org/wiki/Tomasulo_algorithm didn't extend to speculative execution. No doubt because gates were dear, implemented wit…
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I'm not reading anything against responsible disclosure in deaken's comments. How are you getting that?
The whole "since they published that it happened, we've had a bunch of disclosures" which is a typical "I don't feel safer when people talk openly about unfixed vulnerabilities" argument.
In short: * Core and Xeon CPUs affected, others apparently not. * HT on or off, any kind of virtualization, and even SGX are penetrable. * Not OS-specific, apparently. * Sample code provided. https://www.cyberus-technology.de/posts/2019-05-14-zombieloa...
And here's the mitigation in NetBSD: https://github.com/NetBSD/src/commit/afab82aeafd0c51afc036a8... Essentially: Intel released a microcode update which makes the `verw` instruction now magically flush MDS-affected buffers. On vulerable CPUs, this instruction now needs to be run on kernel exit; the microcode update won’t do it automatically on `sysexit`, unfortunately.
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> The safest bet now for the best security is probably to stick to in-order CPUs out-of-order execution != speculative execution. It is possible to have OoO without speculative execution. On the other hand they do tend to come as a pair since they both utilise multiple execution units, for instance the Intel Pentium in 1993 was the first x86 to have OoO or branch prediction (486 and those before were scalar CPUs).
OoO without speculation is completely pointless: the tipical reorder window is orders of magnitude larger than the average number of instructions between conditional jumps. I don't think there have ever been an OoO CPU without speculation. OTOH speculation without OoO Is not only possible but in fact very common. For example the majority of non ancient in-order CPUs. In fact the original pentium, contrary to your sta…
I can't find any evidence to support that [1]
I suppose it's technically possible to have branch prediction on a scalar processor, but I imagine it would not be hugely beneficial.
https://books.google.com.sg/books?id=QzsEAAAAMBAJ&pg=PA59&lp...
Why doesn't this type of news cause INTC to tank - they're up today. I know the market is up today, but (and it's probably my innate overreaction) I would think this sort of news would cause its stock to suffer.
I think there is an expectation that Intel's new generation CPUs wont have these vulnerabilities and they will sell these a lot more to replace the piece of crap they have sold for ridiculous prices. Intel is actually probably happy about these, because no one cares.
Earlier quoted context omitted.
OoO without speculation is completely pointless: the tipical reorder window is orders of magnitude larger than the average number of instructions between conditional jumps. I don't think there have ever been an OoO CPU without speculation. OTOH speculation without OoO Is not only possible but in fact very common. For example the majority of non ancient in-order CPUs. In fact the original pentium, contrary to your sta…
> Also I believe that 486 already had branch prediction I can't find any evidence to support that [1] I suppose it's technically possible to have branch prediction on a scalar processor, but I imagine it would not be hugely beneficial. https://books.google.com.sg/books?id=QzsEAAAAMBAJ&pg=PA59&lp...
Edit: pentium did have a significantly more sophisticated predictor of course, although not without flaws.
We have had the same basic architecture since 2011's Sandy Bridge. That's 8 years of die shrinks and speculation hacks.
This is what happens when you have only 2 players in a major industry and one of them slips away from parity. AMD failed to compete with Bulldozer, so Intel hasn't had to innovate for nearly a decade.
As a result, Intel cpus are now all slower than they were on release and Intel may have to disable hyperthreading for their patches.
This is utterly pathetic. Between this, the other exploits, the shameless price gouging and removal of features, the utter failure of their 10nm process, and the appeal of Ryzen, I think Intel is screwed.
They've been selling us the same crap for 8 straight years. Moore's law isn't dead, Intel just tossed it aside when they realized they didn't have to lift a finger to keep raking in cash.
Can't wait for zen2 and to say bye bye to Intel for a long time.