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Bringing SSD Performance to the DIMM form factor

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Re: Bringing SSD Performance to the DIMM form factor

#201

SSDs as RAM + projects like Tachyon are the future of big data processing -- current workflows are still way too slow. I wonder how this will affect Spark.

> SSDs as RAM

Not yet. I think first we will have SSD as static RAM plus dynamic DIMM RAM as Cache. I wonder when SSD will compete with DIMM regarding maximum number of write operations.

Re: Bringing SSD Performance to the DIMM form factor

#202
post #196

Earlier quoted context omitted.

Only if you want posix compliance across threads and such. If you just want the contents of the file memory mapped nothing stops you from setting up a shared memory segment and mapping it without that filesystem overhead.

Does that work for writes as well? I am not sure if it would work without the OS setting up traps for writes to the pages or explicit flush calls from the app. In the former case, it would be very inefficient, and in the latter, it wouldn't be a clean write-and-forget system.

Yes, it works for writes and support is built-in to current processors. It's faster than conventional file access.

Re: Bringing SSD Performance to the DIMM form factor

#203

Earlier quoted context omitted.

Unlikely. Unless we start making file systems different.

Spectators may want to archive this HN thread for posterity, because I suspect nacnud will have the last laugh. (Nacnud's comment is currently sitting at about -3 points.) It's unlikely that future technological advancements will give malware authors more tools to work with? That seems unlikely, if history is any indication. Imagine when you have 1TB of non-volatile storage which operates at speeds close to those we…

> a virus will write itself to some area that is never overwritten

A simple way to counter this is to tag the memory pages as free/used. If the memory controller reads a page as free, any reads from it can return zeroes without hitting the actual memory bus. Any piece of code that wants to hide will not be part of any active object and its page being marked as used should be considered an allocation error and be easily detectable.

Re: Bringing SSD Performance to the DIMM form factor

#204
post #107

Earlier quoted context omitted.

It doesn't look exceptionally parallel -- the throughput figures are similar to those in PCIe SSDs. 880 MB/s doesn't come close to saturating even a PCIe bus (4 GB/s, for v2 8x), let alone DDR3 (13 GB/s per channel).

I agree, it's not that fast I have 1U servers with lots of RAM slots. Fitting in a RAID 10 is easy enough even in a "modest" 1U server with space for 8 DDR3 slots. We have servers with up to at least 16 DDR3 slots. And in most servers these days, drives take up a massive amount of physical space. Being able to drop the drives and RAID controller has the potential of massively simplifying some server hardware.

Speculation: these SSD dimms will require more power and more cooling than the ordinary dimms.

Re: Bringing SSD Performance to the DIMM form factor

#205
post #71

Earlier quoted context omitted.

What's the point of making it DDR3 DIMM compatible if they require a special motherboard to plug in?

The hope is that a standard will be created soon to support this behaviour. These sorts of things are complicated because it requires support of the chipset vendors. i.e Intel and AMD.

Standard or not, making the sockets equal just add to the confusion. You best plug it into the right socket or your system won't even work.

Using a different socket is best in all cases.

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