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x86 architecture 1 byte opcodes

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Re: x86 architecture 1 byte opcodes

#21

Post by charcircuit »

wewtyflakes wrote: post #19
charcircuit wrote: post #18

Earlier quoted context omitted.

It is entirely reasonable, but these kind of comments are essentially wishing sites could cater to their knowledge level. It's like complaining that the article is not written in French. It's noise in the comment section of an article. If someone wants such a thing, browsers have functionality to translate pages to French. Not every site needs to have their own French translation to suit such a person.

They were not asking for the website to change; they were asking for context so that they can appreciate the website.

In this case the person was not asking anything. The person was stating they didn't understand. The equivalent in my analogy is a French speaker commenting that they don't understand English without further translation into French.

Re: x86 architecture 1 byte opcodes

#22

Post by mras0 »

charcircuit wrote: post #18
mras0 wrote: post #16

Earlier quoted context omitted.

The link is to an opcode map with strange abbreviations with no apparent explanation. Asking "What am I looking at?" without doing any research (with a LLM or otherwise) is entirely reasonable.

It is entirely reasonable, but these kind of comments are essentially wishing sites could cater to their knowledge level. It's like complaining that the article is not written in French. It's noise in the comment section of an article. If someone wants such a thing, browsers have functionality to translate pages to French. Not every site needs to have their own French translation to suit such a person.

I understand what you're getting at, but in this case even I (who know what most things on that page means) struggle to understand why it was submitted. Are we looking for the 0E opcode? New optimization opportunities?

Genuinely asking, for this post did you click on the link and say "yeah, I got the point" or did you involve an LLM? If you did, what did you ask it? I'm asking because I want to get better at LLM use (Another example post (and prompt) where you've used this, that's also fine)!

Re: x86 architecture 1 byte opcodes

#23

Post by classichasclass »

arjvik wrote: post #20
GuB-42 wrote: post #5

Hello sizecoders ;) Additional resources: http://www.sizecoding.org/wiki/DOS A nice PDF with similar content: https://pnx.tf/files/x86_opcode_structure_and_instruction_ov...

Is sizecoding the same as the demoscene?

You could call it a sub-scene of the demoscene, I suppose.

Re: x86 architecture 1 byte opcodes

#24

Post by bigstrat2003 »

charcircuit wrote: post #11
mras0 wrote: post #10

Earlier quoted context omitted.

Not sure why you're being downvoted. You need a to know quite a bit of esoteric knowledge to parse this beyond knowing x86 opcodes (even x86 assembly). It's more or less the same information you get from the intel manuals (specifically appendix 2A of https://www.intel.com/content/www/us/en/developer/articles/t... ). There you can also see what e.g. "Jb" means (a byte sized immediate following the instruction that spe…

>Not sure why you're being downvoted. I downvote people when they say they don't know what something is when they could have used a LLM to explain it to them.

So you would rather people ask a machine that is known to be unreliable and have no idea what it's talking about, than ask a forum of technically skilled people who will give them a good answer. That doesn't seem very reasonable to me.

Re: x86 architecture 1 byte opcodes

#25

Post by mras0 »

arjvik wrote: post #20
GuB-42 wrote: post #5

Hello sizecoders ;) Additional resources: http://www.sizecoding.org/wiki/DOS A nice PDF with similar content: https://pnx.tf/files/x86_opcode_structure_and_instruction_ov...

Is sizecoding the same as the demoscene?

Size optimizing assembly code finds use in a variety of places. Demoscene for size constrained things is one of them, but also "hacking"/exploits and of course "whitehat" stuff (patches / compiler optimization etc).

Re: x86 architecture 1 byte opcodes

#26

Post by sparkie »

Sharlin wrote: post #4

Need a couple of instructions for accessing memory (and possibly loading immediates) but otherwise seems like a perfectly adequate general-purpose instruction set. Might be fun (for some values of "fun") to write a compiler backend for it.

They're one byte opcodes, but not one byte ops. Most of them have operands which are encoded in a ModRM byte which follows the opcode. The ModRM may be followed by a SIB byte, and that may be followed by a a variable size immediate|displacement. There are also optional prefixes to the opcode.

Re: x86 architecture 1 byte opcodes

#27

Post by sparkie »

charcircuit wrote: post #11
mras0 wrote: post #10

Earlier quoted context omitted.

Not sure why you're being downvoted. You need a to know quite a bit of esoteric knowledge to parse this beyond knowing x86 opcodes (even x86 assembly). It's more or less the same information you get from the intel manuals (specifically appendix 2A of https://www.intel.com/content/www/us/en/developer/articles/t... ). There you can also see what e.g. "Jb" means (a byte sized immediate following the instruction that spe…

>Not sure why you're being downvoted. I downvote people when they say they don't know what something is when they could have used a LLM to explain it to them.

You realize that LLMs are trained on human discussions right?

If everyone stops asking questions and asks the LLM instead, there is no new training data for future LLMs to learn from. They will stagnate, or consume their own slop, and regress.

Re: x86 architecture 1 byte opcodes

#28

Post by sagacity »

arjvik wrote: post #20
GuB-42 wrote: post #5

Hello sizecoders ;) Additional resources: http://www.sizecoding.org/wiki/DOS A nice PDF with similar content: https://pnx.tf/files/x86_opcode_structure_and_instruction_ov...

Is sizecoding the same as the demoscene?

Relevant link to the current masters of the sizecoding niche: https://marqueedesign.demoscene.com/

Re: x86 architecture 1 byte opcodes

#30

Post by [deleted] »

charcircuit wrote: post #11
mras0 wrote: post #10

Earlier quoted context omitted.

Not sure why you're being downvoted. You need a to know quite a bit of esoteric knowledge to parse this beyond knowing x86 opcodes (even x86 assembly). It's more or less the same information you get from the intel manuals (specifically appendix 2A of https://www.intel.com/content/www/us/en/developer/articles/t... ). There you can also see what e.g. "Jb" means (a byte sized immediate following the instruction that spe…

>Not sure why you're being downvoted. I downvote people when they say they don't know what something is when they could have used a LLM to explain it to them.

[deleted]
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