I'm guessing you can still find Coral TPU-based boards somewhere but not sure what the support for these will be now that the focus is shifting. Coral TPU also uses subset of tensorflow and its nice to see that the open standard is targeting jax and torch. When I went to see if anyone is selling the boards or their "Partners" page regarding manufacturing design I got 404 even after signing in: https://developers.goog…
Coral NPU: A full-stack platform for Edge AI
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Re: Coral NPU: A full-stack platform for Edge AI
#22Re: Coral NPU: A full-stack platform for Edge AI
#23Re: Coral NPU: A full-stack platform for Edge AI
#24is hardware still squirrelled away behind mega paywalls of one or two companies holding all the EDA software? someone at ycombinator should create a "github for silicon IP" company. that would be awesome.
Re: Coral NPU: A full-stack platform for Edge AI
#25Didn't they abandon the previous Coral accelerators?
Re: Coral NPU: A full-stack platform for Edge AI
#26Re: Coral NPU: A full-stack platform for Edge AI
#27is hardware still squirrelled away behind mega paywalls of one or two companies holding all the EDA software? someone at ycombinator should create a "github for silicon IP" company. that would be awesome.
Like OpenCores?
Re: Coral NPU: A full-stack platform for Edge AI
#28> Hardware-enforced privacy
> A core principle of Coral NPU is building user trust through hardware-enforced security. Our architecture is being designed to support emerging technologies like CHERI, which provides fine-grained memory-level safety and scalable software compartmentalization. With this approach, we hope to enable sensitive AI models and personal data to be isolated in a hardware-enforced sandbox, mitigating memory-based attacks.
Re: Coral NPU: A full-stack platform for Edge AI
#29Re: Coral NPU: A full-stack platform for Edge AI
#30It seems here that Google provides the core IP, and that Synaptic packages this (and probably other related IP blocks) block that can be used to build a SoC. As of now there are no chips announced. So it will be some years before we as software/electronics engineers get to play with it. The architecture seems to be RISC-V array with standard RVV vector instruction set. That is a quite familiar environment for softwar…
I think they announced 5 chips[0] in the SL2610 product line[1] today. It appears they're combining 1-2 ARM Cortex-A55 with a Cortex-M52 and a 1 TOPS NPU. Somewhat more complete data sheet here[2] (which is still a bit anemic, IMHO) There are photos of the devkit hardware that will be offered at [6] if you scroll up a little bit. The original Google Coral lineup offered a 4TOPS accelerator back in 2018-2020.[3][4] Th…