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Weird CPU architectures, the MOV only CPU (2020)

justanotherelectronicsblog.com

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Re: Weird CPU architectures, the MOV only CPU (2020)

#21

Post by cmrdporcupine »

mrob wrote: post #11
PaulHoule wrote: post #7

If you were interested in co-designing a CPU with software the TTA is an attractive way to do it, particularly in that it is easy to design it so you can do more than one MOV at the same time and thus have explicit parallelism. The tough part though is that memory is usually slow and you have to wait an undetermined number of cycles for data to get back from DRAM and while one operation is blocked all the other opera…

How would you handle context switching? You've got a whole lot of exposed state scattered throughout the whole CPU.

I would just have multiple cores, and communication between them happens over a central shared hub, like the Parallax Propeller MCUs. If you want concurrency, push your new task onto a separate core.

Still the problem is writing a compiler for such a system would suck.

Re: Weird CPU architectures, the MOV only CPU (2020)

#23

Post by Lerc »

I have been playing around with my own design, initially inspired by the gigatron, but it seems to have diverged somewhat. ALU is the same, address unit enhanced, but a lot of the rest, program counter and instruction decode ending up completely different. Shuffling the Harvard architecture to be more like a instruction cache, only 16 bytes of instruction memory with long jumps triggering a full instruction memory load from RAM.

Going for transport triggered architecture for additional features seems like a fairly easy win. I kind of started designing one before I realised that's what the design was. The Gigatron has to do some unreasonably hard work for a few operations, like shift right, which is an operation that can fundamentally be done with just wires once you have a mechanism to provide the input and fetch the output.

Definitely not knocking the Gigatron though. Every limitation it has is because it saved a chip, when it comes something minimal to build upon It's pretty cool.

Re: Weird CPU architectures, the MOV only CPU (2020)

#25

Post by aleph_minus_one »

gsliepen wrote: post #2

The Intel architecture is already Turing complete when you just use MOV instructions: https://github.com/xoreaxeaxeax/movfuscator . Of course, you don't even need instructions at all: https://news.ycombinator.com/item?id=5261598

> The Intel architecture is already Turing complete when you just use MOV instructions

No physically existing architecture is Turing-complete, since every CPU can (by physics) only access a finite amount of memory, which means that its state space is finite, in opposite to the infinite state space of a Turing machine.

Re: Weird CPU architectures, the MOV only CPU (2020)

#26

Post by jdiff »

aleph_minus_one wrote: post #25
gsliepen wrote: post #2

The Intel architecture is already Turing complete when you just use MOV instructions: https://github.com/xoreaxeaxeax/movfuscator . Of course, you don't even need instructions at all: https://news.ycombinator.com/item?id=5261598

> The Intel architecture is already Turing complete when you just use MOV instructions No physically existing architecture is Turing-complete, since every CPU can (by physics) only access a finite amount of memory, which means that its state space is finite, in opposite to the infinite state space of a Turing machine.

But that's not a very useful definition so we usually don't both enforcing that constraint.

Re: Weird CPU architectures, the MOV only CPU (2020)

#27

Post by drob518 »

BertoldVdb wrote: post #24

This architecture is good for data path applications, but not really for control flow (eg, think how expensive a context switch would be)

Yea, at best this is useful for deep embedded applications where you need a tiny bit of programmability and where implementation size in gates and cost is at a premium. It’s something you can stuff into a programmable logic device of some sort that you already have in the design. Otherwise, it’s interesting from an academic perspective in terms of studying minimalist computing architectures, but otherwise not practical.

Re: Weird CPU architectures, the MOV only CPU (2020)

#28

Post by Joker_vD »

zyxzevn wrote: post #15

There was a CMOVE architecture around 1990 (Israel), I think. It was very similar. Could not find it on internet, sadly. The MOVE architectures may work best with digital signal processors, because the data-flow is almost constant in such processors. I invented my own version of the move only architecture (around 1992), but focused on speed. So here is my idea below. 1. The CPU only moves within the CPU, like from on…

Sounds similar to TIS-100, but with even more special-purpose units.

Re: Weird CPU architectures, the MOV only CPU (2020)

#30

Post by Animats »

That's actually useful as a minimal machine.

It's possible to have a one instruction machine where the one instruction does a subtract, store, and branch if negative. But it's not very useful. This register-oriented thing is something someone might put inside an FPGA.

This is the the device register mindset, where you do everything by storing into device registers, as a CPU architecture.

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