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Earlier quoted context omitted.
The paper is about integer multiplication, not float
Why would that matter? I understood the point was to speed up matrix multiplication by doing the adds and multiplies in a different order. Shouldn't matter whether the datatype is int, float, complex, whatever.
They're proposing "new hardware architectures" to take advantage of this idea. Anybody with a background in GPU floating point math comment on how realistic this is?
First author here. The hardware architectures are realistic - we developed & evaluated real example hardware implementations for them, validated on FPGA, and they achieved state-of-the-art ResNet performance in a deep learning accelerator system implementation compared to prior accelerators evaluated on similar FPGAs. See the associated accelerator system source code here: https://github.com/trevorpogue/algebraic-nnh…
The basic idea of reducing 4 multiplications to 3 multiplications (ax + b)(cx + d) = acx^2 + [(a + b)(c + d) - ac - bd]x + bd holds pretty generally; there isn't any new math or algorithm here that I can see. Their own complexity analysis (eqns. 7 and 8) shows this performs about the same as using Karatsuba multiplication on the entries of the matrices (instead of on the matrices themselves).
If it offers improvements in both, why wouldn't one do it in both?
Earlier quoted context omitted.
Why would that matter? I understood the point was to speed up matrix multiplication by doing the adds and multiplies in a different order. Shouldn't matter whether the datatype is int, float, complex, whatever.
One can use this techniques to optimize the multiplier inside the FP FMA unit. However this cannot be used to multiply two floating point numbers as FP arithmetic is not associative.
the govy uses specialized hardware that isn't sold on the market right? would something like this be useful in developing said hardware>?
They even has built-in ADC/DAC for communicatiobmn, sensing and data acquisition (DAQ) [2].
On top of that they have native support for dataflow library and framework including linear algebra that is more suitable for data-intensive in which AI is only one of the intended applications [3].
I was recently asked by my colleague why we still need CPU, since GPU is very dominant now and it seems it's all that we need. I just pointed out GPU is only one of the many accelerators available to the CPU, but a very good one that happened to be very useful and biased towards fancy killer applications namely graphic (game), blockchain (bitcoin) and AI (LLM/ChatGPT).
[1] AMD Adaptive SoC Platform: Versal Architecture [pdf]:
https://www.amd.com/content/dam/amd/en/documents/products/ad...
[2] AMD adds RF-sampling data converters to Versal adaptive SoCs (2024):
https://news.ycombinator.com/item?id=42899304
[3] AIEBLAS: Open-Source Expandable BLAS Implementation for AMD/Xilinx Versal Device: