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Virtualizing the 6502 on a 6502 with 6o6

oldvcr.blogspot.com

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Re: Virtualizing the 6502 on a 6502 with 6o6

#21

This is amazing. It brings back memories of the first time I taught myself 6502 assembly, there was a book called “The Visual Computer” that came with an emulator on a floppy disk. It was very eye opening! I found a PDF of the book [1] but not sure if the software on the floppy survives anywhere. [1] https://files.commodore.software/reference-material/books/c6...

[deleted]

Re: Virtualizing the 6502 on a 6502 with 6o6

#22

This is amazing. It brings back memories of the first time I taught myself 6502 assembly, there was a book called “The Visual Computer” that came with an emulator on a floppy disk. It was very eye opening! I found a PDF of the book [1] but not sure if the software on the floppy survives anywhere. [1] https://files.commodore.software/reference-material/books/c6...

Not sure about the C64 one but I've seen the Apple ][ one on the software archive sites before sites before. It's The Visible Computer, a reference to these educational models:

https://americanhistory.si.edu/collections/nmah_214319

'Visual 6502' is the name of the modern gate and transistor level 6502 simulators:

http://visual6502.org/JSSim/index.html

Re: Virtualizing the 6502 on a 6502 with 6o6

#23
post #15

Earlier quoted context omitted.

10c per part is incredibly high depending on how low-cost we're talking. If your chip needs very basic processing, and you're going to sell it for less than a cent per chip, you need your core to be basically free. Sure RISC-V is very inexpensive, but for parts like these risc is massive overkill and as a modern core, you'll be spending a lot of die area on a core that should really be an ASIC, but designing an ASIC…

>but for parts like these risc is massive overkill You seem to underestimate how small a RISC-V core can be. Take a look at SERV.

The area of just the register file (even for rv32e) is higher area than the survivors of the 8 bit ucontrollers.

Re: Virtualizing the 6502 on a 6502 with 6o6

#25
post #22

This is amazing. It brings back memories of the first time I taught myself 6502 assembly, there was a book called “The Visual Computer” that came with an emulator on a floppy disk. It was very eye opening! I found a PDF of the book [1] but not sure if the software on the floppy survives anywhere. [1] https://files.commodore.software/reference-material/books/c6...

Not sure about the C64 one but I've seen the Apple ][ one on the software archive sites before sites before. It's The Visible Computer , a reference to these educational models: https://americanhistory.si.edu/collections/nmah_214319 'Visual 6502' is the name of the modern gate and transistor level 6502 simulators: http://visual6502.org/JSSim/index.html

Thank you, you’re right, I remembered the name wrong. It was The Visible Computer. I was learning on an Apple //c

Re: Virtualizing the 6502 on a 6502 with 6o6

#26

Despite how simple and limited the 6502 is, it's always interesting to see this almost 50-year-old architecture being stretched to new limits. 6502 cores are still found in some SoCs aimed at the ultra-low-cost high-volume market.

There is a ton of code out there for pretty much any task you want.

I have the 16 bit successor, the 65816, on a variable speed expansion card in my Apple 2. I run it in 8 bit mode most of the time mostly because it works and most library code is 8 bit.

At those speeds, the chip is fast! Especially when one considers the simple model: ram clocked 1:1 with the cpu. In my case, I can run code over the 1Mhz bus, essentially turning most multi cycle ops into a single bus cycle per memory fetch.

Or, the card has a megabyte of RAM and that runs at CPU speed. (0.15 to 16 Mhz) When doing that, it is fast enough to run large programs, written in higher level languages, at a useful speed. Of course Assembly language is crazy fast.

It is a pretty fun environment to hack around in.

Re: Virtualizing the 6502 on a 6502 with 6o6

#27
post #15

Earlier quoted context omitted.

>but for parts like these risc is massive overkill You seem to underestimate how small a RISC-V core can be. Take a look at SERV.

The area of just the register file (even for rv32e) is higher area than the survivors of the 8 bit ucontrollers.

16 registers * 32 bits * 4 transistors / cell = 2k transistors just for storing the bits alone, and that's not including the decoding and read/write circuitry.

Re: Virtualizing the 6502 on a 6502 with 6o6

#28

Earlier quoted context omitted.

The area of just the register file (even for rv32e) is higher area than the survivors of the 8 bit ucontrollers.

16 registers * 32 bits * 4 transistors / cell = 2k transistors just for storing the bits alone, and that's not including the decoding and read/write circuitry.

There is no need to do weird math, as we know the actual numbers.

6502 has 3510 transistors. SERV at CMOS occupies 2.1kGE.

SERV is smaller than 6502.

Re: Virtualizing the 6502 on a 6502 with 6o6

#29
post #15

Earlier quoted context omitted.

>but for parts like these risc is massive overkill You seem to underestimate how small a RISC-V core can be. Take a look at SERV.

The area of just the register file (even for rv32e) is higher area than the survivors of the 8 bit ucontrollers.

Not true for SERV vs 6502.

SERV is smaller.

Re: Virtualizing the 6502 on a 6502 with 6o6

#30
post #28

Earlier quoted context omitted.

16 registers * 32 bits * 4 transistors / cell = 2k transistors just for storing the bits alone, and that's not including the decoding and read/write circuitry.

There is no need to do weird math, as we know the actual numbers. 6502 has 3510 transistors. SERV at CMOS occupies 2.1kGE. SERV is smaller than 6502.

Gate Elements are multiple transistors.

And that count doesn't include SERV's register file.

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