FORTH ?KNOW IF HONK ELSE FORTH LEARN THEN
Notch's Specification for the In-Game DCPU-16
21–30 of 177 posts
Re: Notch's Specification for the In-Game DCPU-16
#22Earlier quoted context omitted.
Although some of the implications require experience to understand, I'd say it already is in "relatively plain English", you simply haven't been exposed to the vocabulary and concepts necessary. Trying to explain in any detail would basically be reproducing Wikipedia, so here are some links: http://en.wikipedia.org/wiki/Program_counter http://en.wikipedia.org/wiki/Word_(computer_architecture) http://en.wikipedia.org/…
Reading all these wikipedia pages is going to kill at least an hour of productivity today :/
Re: Notch's Specification for the In-Game DCPU-16
#23Now here's an interesting bit: "Question: can we trade the programs we create? How will you stop malicious viruses etc?" "yes. And I won't stop viruses, the players will have to do that themselves." ~ https://twitter.com/#!/notch/status/187474819980328962
Re: Notch's Specification for the In-Game DCPU-16
#24Just waiting for the first post about programming this CPU to pop up on Stack Overflow ... :) It's quite an interesting architecture. From an initial perusal, I found these features note-worthy: * Explicit access to PC as a register, makes "computed goto" trivial and very natural. * Because of the above, there is no JMP instruction. * Treating operations on registers as "values" makes the instruction set very orthogo…
> No instructions for bit-manipulation. What? Plenty of opcodes for that. SHL, SHR, AND, BOR, XOR are all bitwise operators. Unless you mean bitset and bitclear macros, but no self respecting embedded programmer uses those. I've disagreed with almost everything else Notch has done, but from a simple pedagogical standpoint, he's doing the right thing by leaving those out.
Re: Notch's Specification for the In-Game DCPU-16
#25Earlier quoted context omitted.
Although some of the implications require experience to understand, I'd say it already is in "relatively plain English", you simply haven't been exposed to the vocabulary and concepts necessary. Trying to explain in any detail would basically be reproducing Wikipedia, so here are some links: http://en.wikipedia.org/wiki/Program_counter http://en.wikipedia.org/wiki/Word_(computer_architecture) http://en.wikipedia.org/…
Reading all these wikipedia pages is going to kill at least an hour of productivity today :/
Re: Notch's Specification for the In-Game DCPU-16
#26Now here's an interesting bit: "Question: can we trade the programs we create? How will you stop malicious viruses etc?" "yes. And I won't stop viruses, the players will have to do that themselves." ~ https://twitter.com/#!/notch/status/187474819980328962
Re: Notch's Specification for the In-Game DCPU-16
#27Earlier quoted context omitted.
I'm a self-taught programmer, and don't know much about CPUs. Would someone mind putting this into relatively plain english, I'm quite curious to know the practical implications of this. Can we expect to see Python running on it in the near future for example :) ?
Although some of the implications require experience to understand, I'd say it already is in "relatively plain English", you simply haven't been exposed to the vocabulary and concepts necessary. Trying to explain in any detail would basically be reproducing Wikipedia, so here are some links: http://en.wikipedia.org/wiki/Program_counter http://en.wikipedia.org/wiki/Word_(computer_architecture) http://en.wikipedia.org/…
Lua, perhaps? There was an article how to reduce its binary size, for an older version of the language (Lua 4.0): http://www.lua.org/notes/ltn002.html
With no reductions, and for x86 assembly, it started at ~64KB, so not very useful here; but after dropping standard libraries and parser, they got to ~24KB. Now however, some further questions arise I'm not sure about:
- whether such a virtual machine, when without parser, would be anyhow more useful than the underlying system alone?
- how much the binary code would be bigger when compiled for the "DCPU-16" instruction set instead of x86?
Re: Notch's Specification for the In-Game DCPU-16
#28Just for fun, I wrote a disassembler for his instruction set. https://gist.github.com/2300590 I previously wrote some assembler routines for x86, which is very complex, working with Notch's design is a breeze and actually enjoyable. Does he somewhere mention if the code is loaded into the RAM? This would make self-modifiable code possible.
Re: Notch's Specification for the In-Game DCPU-16
#29Just waiting for the first post about programming this CPU to pop up on Stack Overflow ... :) It's quite an interesting architecture. From an initial perusal, I found these features note-worthy: * Explicit access to PC as a register, makes "computed goto" trivial and very natural. * Because of the above, there is no JMP instruction. * Treating operations on registers as "values" makes the instruction set very orthogo…
I'm a self-taught programmer, and don't know much about CPUs. Would someone mind putting this into relatively plain english, I'm quite curious to know the practical implications of this. Can we expect to see Python running on it in the near future for example :) ?
It has completely demystified the whole low level world of computers for me.
If you can't get the book, a number of exercises and chapters are available for free at this website[2].
[1]: http://www1.idc.ac.il/tecs/ [2]: http://diycomputerscience.com/courses/course/the-elements-of...
Re: Notch's Specification for the In-Game DCPU-16
#30So, er, on a PC if I write data to address 0x378 it'll appear on LPT1. What's the equivalent on DCPU-16? If I write data to a certain address it'll appear on the missile bay ports?
Or is there a level of abstraction?