This article is a polemic. Don't take it personally. Enjoy! Also it's clear they are well versed in the topic. You may not agree but it is great food for thought.
The RISC Deprogrammer
21–30 of 110 posts
Re: The RISC Deprogrammer
#22The author seems to have been quite wound up by claims that "my high end desktop / server (insert ARM / RISC-V to taste) is better than your x86 because 'RISC'". Fair enough. It's an 80's debate really. ISA is probably by a long margin not the most important factor in these comparisons. But he says it makes no difference at all without evidence. And he ignores that there is a whole world of simpler (especially in-ord…
Re: The RISC Deprogrammer
#23"In contrast, 16-bit processors could only address 64-kilobytes of memory, and weren't really practical for real computing." ?
Re: The RISC Deprogrammer
#24This article is a polemic. Don't take it personally. Enjoy! Also it's clear they are well versed in the topic. You may not agree but it is great food for thought.
I don't think Rob has ever designed a single CPU, much less measured the effects of different tradeoffs.
Re: The RISC Deprogrammer
#25One of the idea I take from the piece is that CPU design success is intimately tied to the software ecosystem of the day and Memory Management Units were a big thing for C langage multitasking. I wonder if Rust or similar could make the MMU transistors and energy budget redondant. Disclaimer: I am a 68k fan.
Re: The RISC Deprogrammer
#26One of the idea I take from the piece is that CPU design success is intimately tied to the software ecosystem of the day and Memory Management Units were a big thing for C langage multitasking. I wonder if Rust or similar could make the MMU transistors and energy budget redondant. Disclaimer: I am a 68k fan.
How do you figure? The article outlines MMU development since well before C, it's not like people came up with memory protection because of C.
Re: The RISC Deprogrammer
#27This article is a polemic. Don't take it personally. Enjoy! Also it's clear they are well versed in the topic. You may not agree but it is great food for thought.
Re: The RISC Deprogrammer
#28[dupe] https://news.ycombinator.com/item?id=33332202
Re: The RISC Deprogrammer
#29[dupe] https://news.ycombinator.com/item?id=33332202
Re: The RISC Deprogrammer
#30The author seems to have been quite wound up by claims that "my high end desktop / server (insert ARM / RISC-V to taste) is better than your x86 because 'RISC'". Fair enough. It's an 80's debate really. ISA is probably by a long margin not the most important factor in these comparisons. But he says it makes no difference at all without evidence. And he ignores that there is a whole world of simpler (especially in-ord…
In the case it was missed, he actually does talk about that towards the end, that it matters for low powered microcontrollers and for people unwilling to pay for an ARM license, but for the higher powered machines (ARM machines, x86_64 etc), they are both OoO and that is more of what makes them powerful for modern computing ("real" computing by his definition) than does the RISC vs VAX lineage matters.
> The Cortex-A53 is the most widely used architecture for mobile SoCs since 2014 to the present day, making it one of the longest-running ARM processors for mobile devices. It is currently featured in most entry-level and lower mid-range SoCs, while higher-end SoCs used the newer ARM Cortex-A55. The latest SoCs still using the Cortex-A53 are MediaTek Helio G37, both of which are entry-level SoCs designed for budget smartphones.
These may not be the most exciting CPUs but does the ISA matter here? Yes probably quite a bit. Does it matter that they are compatible with beefier OoO cores in say a big.LITTLE configuration. Yes it does.
I wouldn't mind too much if he had said I'm just talking about high end. But he implicitly claims to cover everything except 100k transistor CPUs.