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ASML's Secret: A view from inside the global semiconductor giant [video]

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Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#21

Post by throwie_wayward »

jdmdmdmdmd wrote: post #14
throwie_wayward wrote: post #10

I absolutely despise the ancient traditional ways they practice: referring to their techniques of 'mystery', secrecy, and occultation of knowledge (which they do in order to construct knowledge as authority and then wield it as power) they've overdone it. by this point they have made it way to fucking difficult for people to truly come to grips with the complexity of modern life mostly becuase in their zealous protec…

>construct knowledge as authority Can you explain why you used the word construct here?

because 'knowledge' on its own will not work to wield power over others just by itself. there are other ingredients in ensuring that knowledge can be used as power; these usually look like 'technology'.

I should also say that it's only due to the internet (and its novel aggregation-theory dynamics) that these old attitudes I am ranting against become truly noxious.

Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#22

Post by AceJohnny2 »

Beldin wrote: post #20

As a student, I did a tour of ASML. One of the coolest things was one of the tour guides bragging how they would inspect the prospective location for a new plant and deny sale if they didn't like it. Why? Because their machines are incredibly sensitive... and equally expensive. And your customers get angry if the machine doesn't work reliably - and rightly so. I don't know if they do that still, and it likely was som…

I recall when STMicroelectronics built their new fab [1] near Grenoble, France, it was built on a kind of stilt-and-spring system to insulate it from vibrations from a nearby highway.

(and similarly, the nearby ILL Synchotron [2] had issues that were eventually tracked to trucks passing on its nearby highway)

[1] https://goo.gl/maps/jNESRpcdMkAtVURM9

[2] https://goo.gl/maps/4oXRXw6pxkxMFCUt5 Note that the satellite view is blurred because that whole area technically belongs to the french CEA, their Nuclear Administration!

Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#24

Post by hnuser123456 »

sylware wrote: post #17

Well, the video does not show the ppl actually designing the blueprint of the machine and doing the R&D, the real brains... we are showed mostly assembly workers (all above averagely skilled), customer service operators, etc. I was surprised to agree with most of what ASML bosses said, and I would have given exactly the same answer than the assembly operator, namely not providing any timeline... because it is complet…

If I understand correctly, chips down to 14nm were made using ~190nm light, not sure how that worked but if that ratio of 10x+ holds, seems like 1nm fab using 13nm light should be doable with the same techniques, not to mention improved ones?

Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#25

Post by lights0123 »

AceJohnny2 wrote: post #22
Beldin wrote: post #20

As a student, I did a tour of ASML. One of the coolest things was one of the tour guides bragging how they would inspect the prospective location for a new plant and deny sale if they didn't like it. Why? Because their machines are incredibly sensitive... and equally expensive. And your customers get angry if the machine doesn't work reliably - and rightly so. I don't know if they do that still, and it likely was som…

I recall when STMicroelectronics built their new fab [1] near Grenoble, France, it was built on a kind of stilt-and-spring system to insulate it from vibrations from a nearby highway. (and similarly, the nearby ILL Synchotron [2] had issues that were eventually tracked to trucks passing on its nearby highway) [1] https://goo.gl/maps/jNESRpcdMkAtVURM9 [2] https://goo.gl/maps/4oXRXw6pxkxMFCUt5 Note that the satellite v…

It's interesting to see that Mapbox blurs its highest zoom level there, but it's second-highest zoom still provides quite a lot of detail to the point where you can make out every car and their color and rough shape.

Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#26

Post by rjzzleep »

doikor wrote: post #4
rjzzleep wrote: post #2

To summarize the video the secret is just how the people collaborate. Some parts seem oddly manual and others interestingly esoteric. Interesting little detail is how that researcher knows the political game of not presenting to Intel but instead having the VP himself present. At least there is a lesson for society here about how to keep people together instead of dividing them. I'm both fascinated by the company, an…

> Some parts seem oddly manual and others interestingly esoteric. They don't really make that many machine for heavy automation to make much sense. By the end of 2021 they had made ~140 EUV machines in total with commercial production starting in 2011. So if you average it out they make ~15 per year. Though the production rate has most likely ramped up over the years so most of those have been built closer to today t…

baybal2 you seem to be shadow banned.

Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#27

Post by jve »

doikor wrote: post #12
rjzzleep wrote: post #5

Earlier quoted context omitted.

Maybe, but then again the demand is far higher than what they can deliver and their solution is to hire thousands more people. While that’s a simple scaling mechanism they were limited by Covid restrictions and will probably be limited by the worsening energy crisis

Even if they 10x their production you are talking about 200 of the same machine max per year. Nowhere near the numbers where proper industrial automation would make much sense. Also who would be buying these machines if they 10x their production? They go into fabs that costs 10 to 20 billion to build. Let’s say you put 10 of them in each fab. It would still require 150 billion in fab investments every year. There is…

All these numbers remind me how people looked at rocketry pre-SpaceX. "Oh, the most complex, expensive, etc thing in the world" (Rightly so)

And then they come in to commoditize the market, make it accessible for lower players by aggressively trying to bring down cost-per-unit via simplicity and process automation.

Not saying it could apply to ASML, but I wonder... :)

Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#28

Post by adrian_b »

sylware wrote: post #17

Well, the video does not show the ppl actually designing the blueprint of the machine and doing the R&D, the real brains... we are showed mostly assembly workers (all above averagely skilled), customer service operators, etc. I was surprised to agree with most of what ASML bosses said, and I would have given exactly the same answer than the assembly operator, namely not providing any timeline... because it is complet…

The so-called "5 nm" CMOS processes have minimum pitches around 30 nm.

I do not know what minimum pitches are planned for the future so-called "2 nm" CMOS processes, but it is likely that they would not be smaller than 15 to 20 nm.

So there will be some time until multiple patterning could be needed again, and by that time there are chances that the transistors will have minimum sizes determined by other causes than lithography, so for further progress a switch to different semiconductor materials will be needed, not a further improvement of lithography.

Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#29

Post by MayeulC »

sylware wrote: post #17

Well, the video does not show the ppl actually designing the blueprint of the machine and doing the R&D, the real brains... we are showed mostly assembly workers (all above averagely skilled), customer service operators, etc. I was surprised to agree with most of what ASML bosses said, and I would have given exactly the same answer than the assembly operator, namely not providing any timeline... because it is complet…

7nm feature size or process? 7nm processes are on ~20 nm feature sizes, but have tighter alignment constraints, as they move into the 3D world.

Re: ASML's Secret: A view from inside the global semiconductor giant [video]

#30

Post by MayeulC »

adrian_b wrote: post #28
sylware wrote: post #17

Well, the video does not show the ppl actually designing the blueprint of the machine and doing the R&D, the real brains... we are showed mostly assembly workers (all above averagely skilled), customer service operators, etc. I was surprised to agree with most of what ASML bosses said, and I would have given exactly the same answer than the assembly operator, namely not providing any timeline... because it is complet…

The so-called "5 nm" CMOS processes have minimum pitches around 30 nm. I do not know what minimum pitches are planned for the future so-called "2 nm" CMOS processes, but it is likely that they would not be smaller than 15 to 20 nm. So there will be some time until multiple patterning could be needed again, and by that time there are chances that the transistors will have minimum sizes determined by other causes than…

Gate length is already determined by tunneling current, you can't really go below 20 nm on Si. Width is determined by the current density you want, and can be reduced with better electrostatic control (FDSOI, FinFET, GAA...)
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