21–30 of 46 posts
I've always wondered why most people seem to draw flip-flops with the crossed wires and both gates pointing the same way, when I think this representation makes it far clearer: https://i.imgur.com/cwZe7Zf.png When both inputs are low, the NORs are equivalent to NOTs and you can see they form a storage loop. When one input is high, it forces the loop into the corresponding state. That said, I'm disappointed this artic…
I once made a single-transistor latch by accident. It acted as a single bit of memory and retained its value for weeks until I got bored with the project. I had been making magnetic snap-together circuits, so I had a bunch of small PCBs with simple 2- and 3-pin footprints and holes that I soldered neodymium disc magnets into. I put a big TO-220 N-fet on one of them, and stuck it to a laminated whiteboard so that the…
FWIW I'm told that decades ago latches were implemented as a tristate driver followed by an inverter or buffer. The source & drain cap, along with gate & wire cap, acted as the memory.
A capacitor is 1 bit of memory.
Yes, but that's different. A simple capacitor does not require an external power supply to store the state, but the state decays in time. A flip-flop requires an external supply to store the state, but the state is stable indefinitely.
I've always wondered why most people seem to draw flip-flops with the crossed wires and both gates pointing the same way, when I think this representation makes it far clearer: https://i.imgur.com/cwZe7Zf.png When both inputs are low, the NORs are equivalent to NOTs and you can see they form a storage loop. When one input is high, it forces the loop into the corresponding state. That said, I'm disappointed this artic…
Your image appears as black on black, you might want to re-upload it or edit the URL. I could only see it by dragging it against a non-black background. Good point otherwise on the clearer schematic!
I've always wondered why most people seem to draw flip-flops with the crossed wires and both gates pointing the same way, when I think this representation makes it far clearer: https://i.imgur.com/cwZe7Zf.png When both inputs are low, the NORs are equivalent to NOTs and you can see they form a storage loop. When one input is high, it forces the loop into the corresponding state. That said, I'm disappointed this artic…
The reason it is not usually drawn that way is it is a cardinal sin to draw logic gates 'backward' on a logic schematic. It is a schematic schematic equivalent of 'goto' and makes schematics confusing to follow. For a simple inverter in a flipflop it isn't so bad, but when you are inside of a larger schematic it is better to stick with the best practice of signals flowing left to right for all symbols. PS - For what…
Even if you draw both gates facing the same way, there is feedback and you still need to follow the signals the other way; but instead of simply turning one the gate in the direction its output is actually going, and showing that structure more clearly, you introduce the extra ugliness and confusion of crossing signals.
Earlier quoted context omitted.
Almost. It's a gated D latch, which is level sensitive and behaves asynchronously, as opposed to a D flip flop, which is an edge sensitive primitive.
Well, flip-flops can be edge-triggered or level-triggered. They're both flip-flops.
> A flip-flop is a storage element based on the gated latch principle, which can have its output state changed only on the edge of the controlling clock signal.
I also just pulled out my Fairchild Pocket Designer Guide (published circa 1985; inherited from a retired former colleague) which explicitly differentiates 74/54 series flip-flops from latches both in section and symbology. So there's at least 35+ years of industry convention without citing standard.
To cite one industry standard, from ANSI/IEEE Std 91-1984[2] § 4.2.1:
> Cm should be used to identify an input that produces action, for example, the edge-triggered clock of a bistable circuit or the level-operated data enable of a transparent latch
...or from § 5.9:
> The symbol for a bistable element (for example, a flip-flop) does not contain a general qualifying symbol. ... When a bistable element is controlled by a C input (Symbol 4.3.7-1) it is necessary to indicate whether this element is a latch, or an edge-triggered, pulse-triggered, or data-lock-out bistable.
In fact, symbol 5.9-2 labeled "D-type latch, dual / Part of SN7475" is distinct from symbol 5.9-7 labeled "Edge-triggered D-type bistable / Part of SN7474"...the former being what the blog discusses.
So no, this designer begs to differ.
[1] 3rd Edition, § 7.7 Summary of Terminology
Earlier quoted context omitted.
The reason it is not usually drawn that way is it is a cardinal sin to draw logic gates 'backward' on a logic schematic. It is a schematic schematic equivalent of 'goto' and makes schematics confusing to follow. For a simple inverter in a flipflop it isn't so bad, but when you are inside of a larger schematic it is better to stick with the best practice of signals flowing left to right for all symbols. PS - For what…
The whole point is that the signals can't all flow left to right in any reasonably nontrivial design, because the latter will almost always have feedback, and at its fundamental level that is how static memory works. Even if you draw both gates facing the same way, there is feedback and you still need to follow the signals the other way; but instead of simply turning one the gate in the direction its output is actual…
Certainly there are different fields that follow different rules, for example in schematic representation of feedback systems the feedback blocks are often drawn right-to-left. They get away with it because their schematics are generally much simpler--usually a dozen or so blocks, compared to hundreds or thousands in a nontrivial digital circuit schematic.
Also - I am not sure I understand your comment about 'extra ugliness and confusion of crossing signals'. Flipping the inverter backwards does nothing to remove the signal cross, it just moves the cross outside of the region you showed. Note how one of the inputs to your flipflop is now on the right hand side--in most cases the crossing will reappear when you connect the rest of your circuit.
Earlier quoted context omitted.
FWIW I'm told that decades ago latches were implemented as a tristate driver followed by an inverter or buffer. The source & drain cap, along with gate & wire cap, acted as the memory.
That's how DRAMs work today