Where does the 5 GB/s napkin estimate for RAM come from? Its lower than the pointer chasing fihure of 7 GB/s.
Memory Bandwidth Napkin Math
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Re: Memory Bandwidth Napkin Math
#22Where does the 5 GB/s napkin estimate for RAM come from? Its lower than the pointer chasing fihure of 7 GB/s.
Unlike just reading a bunch of random data the read instructions can't be pipelined, the instruction that uses the read pointer can't be dispatched to the load-store unit until after it's address has arrived in the CPU (two reads where you know the address can just be queued, and even finished out of order if the second one hits in a closer cache than the first one)
Re: Memory Bandwidth Napkin Math
#23150ms round trip California to the Netherlands. Oof. That's like 9 frames of a 60fps video. The speed of light sucks! Someone should do something about that!
Re: Memory Bandwidth Napkin Math
#24Nice. It explains a few "WTF" performance issues I had in the past.
Re: Memory Bandwidth Napkin Math
#25150ms round trip California to the Netherlands. Oof. That's like 9 frames of a 60fps video. The speed of light sucks! Someone should do something about that!
You can if you make the Planck constant a variable. People are postulating it just might be under the right conditions.
https://iopscience.iop.org/article/10.1088/1742-6596/1051/1/...
Re: Memory Bandwidth Napkin Math
#26I'm having trouble finding information on the datatype used, 'matrix4x4_simd'. Can anyone point me to some resources to learn about these?
Check out pages 48-49.
http://englishonlineclub.com/pdf/Metal%20Programming%20Guide...
Re: Memory Bandwidth Napkin Math
#27150ms round trip California to the Netherlands. Oof. That's like 9 frames of a 60fps video. The speed of light sucks! Someone should do something about that!
SF to Amsterdam is 5448 miles, which is 0.29 lightseconds, or 29ms at the speed of light, or about 2 frames of 60fps video, so 5X faster. :)
Re: Memory Bandwidth Napkin Math
#28It's funny, I had this conversation last week as the coworker, but didn't actually know how to go about calculating this without running tests. It does seem like there are classes of problems which are completely bandwidth-limited. I've heard this is the next area of expansion for hardware tech, but I haven't seen much yet.
> I've heard this is the next area of expansion for hardware tech, but I haven't seen much yet. This has been an continuously active area of hardware design since the 1960s (consider Cray's work on the 6600 and his later work at his own company). The whole HPC world has to obsess on this issue.
Fair enough. I was thinking compared to cpu clock speed and ram capacity, which seemed to have been an area of greater focus compared to the bandwidth between them.
Re: Memory Bandwidth Napkin Math
#29150ms round trip California to the Netherlands. Oof. That's like 9 frames of a 60fps video. The speed of light sucks! Someone should do something about that!
Plenty of money to be made if you drill through the earth and run some fiber optics.
Re: Memory Bandwidth Napkin Math
#30> Let this sink in. Random access into the cache has comparable performance to sequential access from RAM. The drop off from sub-L1 16 KB to L2-sized 256 KB is 2x or less. > I think this has profound implications. I think I agree. Can anyone here posit a theory why this is true? Is this a consequence of all the stream processing work in recent generations of processor? Or something else? Is he saying that pointer cha…
The CPU data caches are low latency and high throughput if you hit them. There is nothing more to it. The interesting questions are:
* What is your cache hit rate? * How much of each cache hit is used? * Are you utilizing all available resources e.g. memory channels, cache banks, vector lanes?